準同期式回路の最小クロック周期を求めるアルゴリズムの高速化

Publication Information

Title

Japanese:	準同期式回路の最小クロック周期を求めるアルゴリズムの高速化
English:	A fast algorithm to compute the minimum clock period of Semi-Synchronous Circuits

Author

Japanese:	大石亮介, 高橋篤司.
English:	Ryosuke Oishi, Atsushi Takahashi.

Language

Japanese

Journal/Book name

Japanese:	電子情報通信学会技術研究報告 (VLD99-125)
English:	IEICE Technical Report (VLD99-125)

Volume, Number, Page

Vol. 99 No. 659 pp. 63-68

Published date

Mar. 3, 2000

Publisher

Japanese:
English:

Conference name

Japanese:	VLSI設計技術研究会
English:	Technical Committee on VLSI Design Technologies

Conference site

Japanese:
English: