A Practical Clock Tree Synthesis for Semi-Synchronous Circuits

Publication Information

Title

Japanese:
English:	A Practical Clock Tree Synthesis for Semi-Synchronous Circuits

Author

Japanese:	Masahiko Toyonaga, Keiichi Kurokawa, Takuya Yasui, 高橋篤司.
English:	Masahiko Toyonaga, Keiichi Kurokawa, Takuya Yasui, Atsushi Takahashi.

Language

English

Journal/Book name

Japanese:
English:	Proc. ACM International Symposium on Physical Design (ISPD 2000)

Volume, Number, Page

pp. 159-164

Published date

Apr. 2000

Publisher

Japanese:
English:

Conference name

Japanese:
English:

Conference site

Japanese:
English:

DOI