ピーク電力削減のためのクロックスケジュール手法

Publication Information

Title

Japanese:	ピーク電力削減のためのクロックスケジュール手法
English:	Clock scheduling Method to Reduce the Peak Power for Semi-synchronous Circuits

Author

Japanese:	宇多川勉, 高橋篤司.
English:	Tsutomu Utagawa, Atsushi Takahashi.

Language

Japanese

Journal/Book name

Japanese:	電子情報通信学会技術研究報告 (VLD2000-143)
English:	IEICE Technical Report (VLD2000-143)

Volume, Number, Page

Vol. 100 No. 646 pp. 55-60

Published date

Mar. 2, 2001

Publisher

Japanese:
English:

Conference name

Japanese:	VLSI設計技術研究会
English:	Technical Committee on VLSI Design Technologies

Conference site

Japanese:
English: