Analysis of non-volatile latch circuits with ferroelectric-gate field effect transistors for low power and low voltage operation

Publication Information

Title

Japanese:
English:	Analysis of non-volatile latch circuits with ferroelectric-gate field effect transistors for low power and low voltage operation

Author

Japanese:	Shuu'ichirou Yamamoto, Susumu Inoue, Hiroshi Ishiwara.
English:	Shuu'ichirou Yamamoto, Susumu Inoue, Hiroshi Ishiwara.

Language

English

Journal/Book name

Japanese:
English:	Proceedings of the 23rd International Conference on Microelectronics

Volume, Number, Page

Vol. 2 pp. 589-592

Published date

2002

Publisher

Japanese:
English:

Conference name

Japanese:
English:

Conference site

Japanese:
English: