A High-Speed and Low-Power Clock Tree Synthesis by Dynamic Clock Scheduling

Publication Information

Title

Japanese:
English:	A High-Speed and Low-Power Clock Tree Synthesis by Dynamic Clock Scheduling

Author

Japanese:	Keiichi Kurokawa, Takuya Yasui, Yoichi Matsumura, Masahiko Toyonaga, 高橋篤司.
English:	Keiichi Kurokawa, Takuya Yasui, Yoichi Matsumura, Masahiko Toyonaga, Atsushi Takahashi.

Language

English

Journal/Book name

Japanese:
English:	IEICE Trans. Fundamentals

Volume, Number, Page

Vol. E85-A No. 12 pp. 2746-2755

Published date

Dec. 1, 2002

Publisher

Japanese:
English:

Conference name

Japanese:
English:

Conference site

Japanese:
English:

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