Clock Period Minimization Method of Semi-Synchronous Circuits by Delay Insertion

Publication Information

Title

Japanese:
English:	Clock Period Minimization Method of Semi-Synchronous Circuits by Delay Insertion

Author

Japanese:	小平行秀, 高橋篤司.
English:	Yukihide Kohira, Atsushi Takahashi.

Language

English

Journal/Book name

Japanese:
English:	IEICE Trans. Fundamentals

Volume, Number, Page

Vol. E88-A No. 4 pp. 892-898

Published date

Apr. 1, 2005

Publisher

Japanese:
English:

Conference name

Japanese:
English:

Conference site

Japanese:
English:

File

DOI