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Publication Information
Title
Japanese:
CADツールを用いた一般同期向けクロック木の一合成法
English:
A Clock Tree Synthesis Method by Using CAD Tools for General-synchronous Circuits
Author
Japanese:
原田陽介
,
橋本浩良
,
小平行秀
,
高橋篤司
.
English:
Yosuke Harada
,
Hiroyoshi Hashimoto
,
Yukihide Kohira
,
Atsushi Takahashi
.
Language
Japanese
Journal/Book name
Japanese:
電子情報通信学会技術研究報告 (VLD2006-127)
English:
IEICE Technical Report (VLD2006-127)
Volume, Number, Page
Vol. 106 No. 548 pp. 49-53
Published date
Mar. 8, 2007
Publisher
Japanese:
English:
Conference name
Japanese:
VLSI設計技術研究会
English:
Technical Committee on VLSI Design Technologies
Conference site
Japanese:
English:
©2007
Institute of Science Tokyo All rights reserved.