Performance and Reliability Driven Clock Scheduling of Sequential Logic Circuits

Publication Information

Title

Japanese:
English:	Performance and Reliability Driven Clock Scheduling of Sequential Logic Circuits

Author

Japanese:	高橋篤司, 梶谷洋司.
English:	Atsushi Takahashi, Yoji Kajitani.

Language

English

Journal/Book name

Japanese:
English:	Proc. Asia and South Pacific Design Automation Conference '97 (ASP-DAC)

Volume, Number, Page

pp. 37-42

Published date

Jan. 1997

Publisher

Japanese:
English:

Conference name

Japanese:
English:

Conference site

Japanese:
English:

DOI