A Fast Register Relocation Method for Circuit Size Reduction in Generalized-Synchronous Framework

Publication Information

Title

Japanese:
English:	A Fast Register Relocation Method for Circuit Size Reduction in Generalized-Synchronous Framework

Author

Japanese:	小平行秀, 高橋篤司.
English:	Yukihide Kohira, Atsushi Takahashi.

Language

English

Journal/Book name

Japanese:
English:	Proc. the 2007 IEEE International Symposium on Circuits and Systems (ISCAS 2007)

Volume, Number, Page

pp. 1795-1798

Published date

May 2007

Publisher

Japanese:
English:

Conference name

Japanese:
English:

Conference site

Japanese:
English:

DOI