2層BGAパッケージにおける配線混雑度低減のための詳細ビア配置手法

Publication Information

Title

Japanese:	2層BGAパッケージにおける配線混雑度低減のための詳細ビア配置手法
English:	A Detail Via Arrangement Method for Reduction of Wire Congestion in 2-Layer Ball Grid Array Packages

Author

Japanese:	木下昌紀, 富岡洋一, 高橋篤司.
English:	Masaki Kinoshita, Yoichi Tomioka, Atsushi Takahashi.

Language

Japanese

Journal/Book name

Japanese:	電子情報通信学会技術研究報告 (VLD2009-30)
English:	IEICE Technical Report (VLD2009-30)

Volume, Number, Page

Vol. 109 No. 201 pp. 7-12

Published date

Sept. 24, 2009

Publisher

Japanese:
English:

Conference name

Japanese:	VLSI設計技術研究会
English:	Technical Committee on VLSI Design Technologies

Conference site

Japanese:
English: