Nonvolatile Delay Flip-Flop Based on Spin-Transistor Architecture and Its Power-Gating Applications

Publication Information

Title

Japanese:
English:	Nonvolatile Delay Flip-Flop Based on Spin-Transistor Architecture and Its Power-Gating Applications

Author

Japanese:	山本修一郎, 菅原聡.
English:	S. Yamamoto, Satoshi Sugahara.

Language

English

Journal/Book name

Japanese:
English:	Jpn. J. Appl. Phys.

Volume, Number, Page

vol. 49 no. 9 pp. 090204/1-3

Published date

2010

Publisher

Japanese:
English:

Conference name

Japanese:
English:

Conference site

Japanese:
English:

DOI