FPGA上に実現した可変レイテンシ回路の動作検証

Publication Information

Title

Japanese:	FPGA上に実現した可変レイテンシ回路の動作検証
English:	Behavior Verification of a Variable Latency Circuit on FPGA

Author

Japanese:	右近祐太, 井上雅文, 高橋篤司, 谷口研二.
English:	Yuuta Ukon, Masafumi Inoue, Atsushi Takahashi, Kenji Taniguchi.

Language

Japanese

Journal/Book name

Japanese:	電子情報通信学会技術研究報告 (VLD2010-142)
English:	IEICE Technical Report (VLD2010-142)

Volume, Number, Page

Vol. 110 No. 432 pp. 153-158

Published date

Mar. 4, 2011

Publisher

Japanese:
English:

Conference name

Japanese:	VLSI設計技術研究会
English:	Technical Committee on VLSI Design Technologies

Conference site

Japanese:
English: