A Simulated Annealing Based Approach to Integrated Circuit Layout Design

Publication Information

Title

Japanese:
English:	A Simulated Annealing Based Approach to Integrated Circuit Layout Design

Author

Japanese:	盛益強, 高橋篤司.
English:	Yiqiang Sheng, Atsushi Takahashi.

Language

English

Journal/Book name

Japanese:
English:	Simulated Annealing - Single and Multiple Objective Problems

Volume, Number, Page

pp. 239-260

Published date

Oct. 17, 2012

Publisher

Japanese:
English:	InTech

Conference name

Japanese:
English:

Conference site

Japanese:
English:

File

Official URL

DOI