FPGA上に実現した可変レイテンシ技術を用いた乗算器の性能検証

Publication Information

Title

Japanese:	FPGA上に実現した可変レイテンシ技術を用いた乗算器の性能検証
English:	The Evaluation of Performance of Multiplier with Variable-Latency Technology on FPGA

Author

Japanese:	大月郷史, 高橋篤司.
English:	Satosi Otsuki, Atsushi Takahashi.

Language

Japanese

Journal/Book name

Japanese:	DAシンポジウム2013 論文集，情報処理学会シンポジウムシリーズ
English:	Proc. DA Symposium 2013, IPSJ Symposium Series

Volume, Number, Page

Vol. 2013 No. 3 pp. 157-162

Published date

Aug. 22, 2013

Publisher

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Conference name

Japanese:
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Conference site

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