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Publication Information
Title
Japanese:
CMOS集積回路による分周器を用いない低ジッタクロック発生器の研究
English:
A Study of Low-Jitter Divider-Less CMOS Clock Generators
Author
Japanese:
ARAVIND THARAYIL NARAYANAN
.
English:
ARaVIND THARAYIL NARAYANAN
.
Type
Type:
Thesis (Ph.D.) Summary
Country:
Japan
Language
Japanese
Organization name
Tokyo Institute of Technology
Report number
甲第10564号
Conferred date
2017/03/26
Judge
File
©2007
Institute of Science Tokyo All rights reserved.