An On-chip Router Architecture for Dependable Multicore Processor | Tokyo Tech Research Repository (T2R2)

Publication Information

Title

Japanese:
English:	An On-chip Router Architecture for Dependable Multicore Processor

Author

Japanese:	吉瀬謙二.
English:	Kenji Kise.

Language

English

Journal/Book name

Japanese:
English:	VLSI Design and Test for Systems Dependability

Volume, Number, Page

pp. 635-643

Published date

Jan. 2019

Publisher

Japanese:
English:	Springer Japan

Conference name

Japanese:
English:

Conference site

Japanese:
English:

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