A New Architecture of Store Energy and Latency Reduction for Nonvolatile SRAM Based on Spintronics/CMOS-Hybrid Technology

Publication Information

Title

Japanese:
English:	A New Architecture of Store Energy and Latency Reduction for Nonvolatile SRAM Based on Spintronics/CMOS-Hybrid Technology

Author

Japanese:	北形大樹, 山本修一郎, 菅原聡.
English:	D. Kitagata, S. Yamamoto, S. Sugahara.

Language

English

Journal/Book name

Japanese:
English:

Volume, Number, Page

Published date

Sept. 9, 2018

Publisher

Japanese:
English:

Conference name

Japanese:
English:	2018 International Conference on Solid State Device and Materials (SSDM2018)

Conference site

Japanese:
English:	Tokyo