【IMPORTANT】T2R2 and STAR Search: Service Discontinuation and Successor Systems Japanese

Home > Help Publication Information Title Japanese: アナログ集積回路面積削減のためのボトルネックチャネル配線の提案  English: Bottleneck Channel Routing to Reduce the Area of Analog VLSI  Author Japanese: 谷口和弥, 田湯智, 高橋篤司, 轟祐吉, 南誠.   English: Kazuya Taniguchi, Satoshi Tayu, Atsushi Takahashi, Yukichi Todoroki, Makoto Minami.   Language Japanese  Journal/Book name Japanese: 電子情報通信学会技術研究報告 (VLD2021-77)  English: IEICE Technical Report (VLD2021-77)  Volume, Number, Page Vol. 121    No. 412    pp. 7-12 Published date Mar. 2022  Publisher Japanese:   English:   Conference name Japanese: VLSI設計技術研究会  English: Technical Committee on VLSI Design Technologies  Conference site Japanese:   English:

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