端子上下配置3層ボトルネック配線に対するトラック割当て法の提案

Publication Information

Title

Japanese:	端子上下配置3層ボトルネック配線に対するトラック割当て法の提案
English:	Three-layer Bottleneck Channel Track Assignment for Pins Placed on Opposite Sides

Author

Japanese:	谷口和弥, 田湯智, 高橋篤司, モロンゴマチュー, 南誠, 西岡克也.
English:	Kazuya Taniguchi, Satoshi Tayu, Atsushi TAKAHASHI, Mathieu Molongo, Makoto Minami, Katsuya Nishioka.

Language

Japanese

Journal/Book name

Japanese:	電子情報通信学会技術研究報告 (VLD2023-103)
English:	IEICE Technical Report (VLD2023-103)

Volume, Number, Page

Vol. 123 No. 390 pp. 24-29

Published date

Feb. 2024

Publisher

Japanese:
English:

Conference name

Japanese:	VLSI設計技術研究会
English:	Technical Committee on VLSI Design Technologies

Conference site

Japanese:
English: