Coupling structure for enabling both wafer- and chip-level characterization of silicon photonic integrated circuits

Publication Information

Title

Japanese:
English:	Coupling structure for enabling both wafer- and chip-level characterization of silicon photonic integrated circuits

Author

Japanese:	MOATAZShaher Anis Mahmoud Eissa, 佐々木龍耶, 堀川剛, 雨宮智宏, 西山伸彦.
English:	Shaher Anis Mahmoud Eissa Moataz, Ryuya Sasaki, Tsuyoshi Horikawa, Tomohiro Amemiya, Nobuhiko Nishiyama.

Language

English

Journal/Book name

Japanese:
English:	Proceedings of IEEE SiPhotonics 2024

Volume, Number, Page

Published date

Apr. 15, 2024

Publisher

Japanese:
English:	IEEE

Conference name

Japanese:
English:	IEEE SiPhotonics 2024

Conference site

Japanese:
English: