"湯本厚史,杉野暢彦","GPGPUアプリケーションの開発支援のためのC言語コードからのCUDAコード生成ツール","組込みシステム技術に関するサマーワークショップ SWEST13",,,,,,2011,Sept.
"Atsushi Yumoto,Nobuhiko Sugino","A Programming Framework for Parallelization with Dynamic Task Assignment to GPU and CPU","The International Conference on Information and Communication Technology for Embedded Systems (IC-ICTES 2011)",,,,,,2011,Jan.
"杉野暢彦,一色 剛,西原明法,國枝博昭","バンコクだより 東工大から世界へ ?タイ国との連携大学院TAIST-Tokyo Techの取り組み?",,"Fundamentals Review","電子情報通信学会","Vol. 12","No. 4","pp. 102-105",2009,Apr.
"三好健文,杉野暢彦","柔軟なシステム設計のためのシミュレーション環境MICSの動作速度の評価","電子情報通信学会２００７年総合大会","電子情報通信学会",,,,"pp. A-3-16",2007,Mar.
"伊藤正人,三好健文,杉野暢彦","動的再構成可能プロセッサのためのコンテキスト自動抽出とプログラムの等価変換による改善の検討","電子情報通信学会２００６年ソサイエティ大会，A-3-4","電子情報通信学会",,,,"pp. A-3-4",2006,Sept.
"鳥生哲也,杉野暢彦","マルチプロセッサ用の信号処理アルゴリズム向け最適化コンパイラの研究","電子情報通信学会２００６年ソサイエティ大会","電子情報通信学会",,,,"pp. A-3-3",2006,Sept.
"三好健文,杉野暢彦","確率モデルにもとづく細粒度自動並列化コンパイラの検討","電子情報通信学会２００６年ソサイエティ大会","電子情報通信学会",,,,"pp. A-3-2",2006,
"金子雄平,杉野暢彦","コンパイラにおける複数のコード最適化方法の統合に関する一考察","電子情報通信学会 回路とシステム研究会","電子情報通信学会",,,,"pp. CAS2005-114",2006,
"杉野暢彦","マルチVLIWプロセッサ向け高効率コード自動生成についての研究","STARCシンポジウム2005","　",,"Vol. 　","No. 　","pp. 　",2005,Sept.
"Takefumi MIYOSHI,Nobuhiko SUGINO","Techniques for Analysis and Parallelization of Program by Use Of 3-D Representation Space","2005年並列／分散／協調処理に関する 『武雄』サマー・ワークショップ（SWoPP武雄2005）","情報処理学会 プログラミング研究会",,"Vol. PRO055",,,2005,Aug.
"三好健文,杉野暢彦","三次元表現空間によるモジュール横断最適化コンパイラの実現ための一手法","第7回 組込みシステム技術に関するサマーワークショップ （SWEST7）","SWEST7予稿集",,"Vol. 　","No. 　","pp. 　",2005,Aug.
"金子雄平,杉野暢彦","コンパイラによる複数最適化方法の統合に関する一考察",,"電子情報通信学会技術研究報告",,"Vol. 105","No. 146","pp. CAS2005-19, 25-29",2005,June
"NOBUHIKO SUGINO,Tomoyuki Matsuura,Akinori Nishihara","New Graph Transformation Schemes in Graph-Based Memory Allocation Method for an Indirect Addressing DSP","International Symposium on Circuits and Systems","International Symposium on Circuits and Systems",,,,"pp. 4855-4858",2005,May
"Yuhei Kaneko,NOBUHIKO SUGINO,Akinori Nishihara","Memory Allocation and Code Optimization Methods for DSPs with Indexed Auto-Modification",,"Transaction on Fundamentals of Electronics, Communications and Computer Sciences",,"Vol. E88-A","No. 4","pp. 846-854",2005,Apr.
"Takefumi MIYOSHI,Nobuhiko SUGINO","Unified Phase Compiler by Use of 3-D Representation Space",,"Transaction on Fundamentals of Electronics, Communications and Computer Sciences",,"Vol. E88-A","No. 4","pp. 838-845",2005,Apr.
"Takefumi MIYOSHI,Nobuhiko SUGINO","A technique to analyze bus architecture driven by data stream","電子情報通信学会回路とシステム研究会","IEICE, Technical Report on  Circuits and Systems",,"Vol. 104","No. 557","  CAS2004-75，",2005,Jan.
"金子雄平,杉野暢彦,西原明法","コンパイラにおける複数最適化方法の統合技術に関する一考察","電子情報通信学会回路とシステム研究会","電子情報通信学会技術研究報告",,"Vol. 104","No. CAS2004-76","pp. 21-25",2005,Jan.
"宮岡信博,米倉章良,杉野暢彦","ディジタルロックインアンプの実現に関する一考察","電子情報通信学会回路とシステム研究会","電子情報通信学会技術研究報告",,"Vol. 104","No. 557","  CAS2004-77, 29-34",2005,Jan.
"Yuhei Kaneko,NOBUHIKO SUGINO,Akinori Nishihara","Schedule Method for Efficient Memory Addressing",,"IEEE TENCON 2004",,,"No. A-017","pp. 17-20",2004,
"杉野暢彦,金子雄平,西原明法","離散更新可能な間接アドレッシング DSP用のメモリ配置方法",,"電子情報通信学会技術研究報告",,,"No. CAS2004-57",,2004,
"金子雄平,杉野暢彦,西原明法","間接アドレッシングにおけるメモリアク セスを考慮した計算順序の一決定方法",,"電子情報通信学会技術研究報告",,,"No. CAS2004-41",,2004,
"金子雄平,杉野暢彦,西原明法","メモリアドレッシングの効率化を考慮 したスケジューリング",,"第17回 回路とシステム軽井沢ワークショップ",,,,"pp. 129-134",2004,
"NOBUHIKO SUGINO,Masashi HORI,Akinori NISHIHARA","Memory Allocation Method for Indirect Addressing DSPs with ±2n Auto-modification Operations",,"International Technical Conference on Circuits/Systems, Computers and Communications",,,,,2003,July
"堀 昌史,杉野暢彦,西原明法","±2^n自動更新可能な間接アドレッシングに有効なアドレス決定法",,"電子情報通信学会技術研究報告",,,"No. DSP2002-188",,2003,
"金子雄平,杉野暢彦,西原明法","メモリアクセスを考慮したスケジューリングによるコード最適化手","第18回ディジタル信号処理シンポジウム","第18回ディジタル信号処理シンポジウム",,,"No. C4-5",,2003,
"金子雄平,杉野暢彦,西原明法","インデックス修飾更新に有効なアドレス配置手法","第17回ディジタル信号処理シンポジウム","第17回ディジタル信号処理シンポジウム講演論文集","1電子情報通信学会",,,"pp. B2-1",2002,Nov.
"Y. Kaneko,Nobuhiko Sugino,Akinori Nishihara","Memory Allocation Method for Indirect Addressing with Index Register","Asia Pacific Conference on Circuits and Systems","Asia Pacific Conference on Circuits and Systems","IEEE",,"No. 1","pp. 199-202",2002,Oct.
"杉野暢彦","DSPプログラミング技術の進展",,"電子情報通信学会ソサイエティ大会",,,,,2002,
"三好健文,田所想平,杉野暢彦","非決定要素をもつDSPプログラムの可視化手法",,"第17回ディジタル信号処理シンポジウム講演論文集",,,,"pp. B2-2",2002,
"杉野暢彦,松浦 智之,西原 明法","±2^n自動更新可能な間接アドレッシングDSPのための変数配置の一改善方法",,"第16回ディジタル信号処理シンポジウム",,,,"pp. 777-782",2001,Nov.
"NOBUHIKO SUGINO,Akinori Nishihara","Code Optimization Technique for Indirect Addressing DSPs with Consideration in Local Computational Order and Memory Allocation",,"IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences",,"Vol. E84-A","No. 8","pp. 1960-1968",2001,Aug.
"NOBUHIKO SUGINO,Tomoyuki Matsuura,Akinori Nishihara","New Cost Function Schemes in Graph-based Memory Allocation Method for a Indirect Addressing DSP","Eurropean Conference on Circuit Theory and Design","Eurropean Conference on Circuit Theory and Design",,"Vol. II",,"pp. 221-224",2001,Aug.
"N. Sugino,T. Matsuura,A. Nishihara","New Cost Evaluation Schemes in Graph-based Memory Allocation Method for a Indirect Addressing DSP",,"Proceedings of the 15th European Conference on Circuit Theory and Design",,,"No. II","pp. 221-224",2001,
"杉野暢彦,西原明法","DSPプログラミングとコンパイラ事例",,"高速信号処理応用技術学会誌","高速信号処理応用技術学会","Vol. l.3","No. 3","pp. 8-14",2000,Sept.
"杉野暢彦,橋本 淳,船木春重,西原明法","後置自動メモリ複製操作付きの命令を有するDSPのための計算順序決定方法とメモリ配置決定方法とそれらのコンパイラへの応用",,"第14回ディジタル信号処理シンポジウム講演論文集",,,,"pp. 605-610",2000,
"松浦智之,杉野暢彦,西原明法","新しい重み付評価関数に基づく間接アドレシングDSPのための変数配置方法",,"電子情報通信学会技術研究報告",,,"No. DSP2000-70","pp. 61-66",2000,
"許 行洲,杉野暢彦,西原明法","マルチターゲットDSPコンパイラ",,"電子情報通信学会技術研究報告",,,"No. DSP2000-18","pp. 77-84",2000,
"松浦智之,杉野暢彦,西原明法","新しい重み付評価関数に基づく間接アドレシングDSPのための変数配置方法",,"電子情報通信学会技術研究報告",,,,"pp. DSP2000-70",2000,
"許 行洲,杉野暢彦,西原明法","マルチターゲットDSPコンパイラ",,"電子情報通信学会技術研究報告",,,,"pp. DSP2000-18",2000,
"杉野暢彦,西原明法","DSPプログラミングとコンパイラ事例",,"高速信号処理応用技術学会誌",,"Vol. 13","No. 3","pp. 8-14",2000,
"杉野暢彦,石井 渉,西原明法","パイプライン化DSPの条件分岐命令に 伴う最悪実行時間を短縮するコード最適化手法","電子情報通信学会2000年総合大会","電子情報通信学会2000年総合大会",,,,"pp. A-4-27",2000,
"杉野暢彦,橋本 淳,船木春重,西原明法","後置自動メモリ複製操作付きの命令を 有するDSPのための計算順序決定方法とメモリ配置決定方法とそれらのコ ンパイラへの応用",,"第14回ディジタル信号処理シンポジウム",,,,"pp. 605-610",2000,
"T. Haga,Nobuhiko Sugino,Akinori Nishihara","Memory Allocation Method for an Indirect Addressing DSP with $2^m$ Modulo Update Operations","International Symposium on Intelligent Signal Processing and Communication Systems","International Symposium on Intelligent Signal Processing and Communication Systems","IEEE",,,"pp. 605-608",1999,Dec.
"妹尾 竜太郎,杉野 暢彦,西原 明法","インデクス付き更新を考慮した間接アドレッシングDSPのメモリ配置手法","第14回ディジタル信号処理シンポジウム","第14回ディジタル信号処理シンポジウム講演論文集","電子情報通信学会",,,"pp. 617-622",1999,Nov.
"Nobuhiko Sugino,Harushige Funaki,Akinori Nishihara","Memory Address Allocation Method for an Indirect Addressing DSP with Consideration of Modification in Local Computational Order","International Symposium on Circuits and Systems '99","International Symposium on Circuits and Systems '99","IEEE",,"No. ?","pp. 496?499",1999,June
"小暮 央,杉野暢彦,西原明法","更新レンジの広いアドレスレジスタの複数使用による間接アドレッシングDSPのために効率的なメモリアドレス配置","第12回 回路とシステム(軽井沢)ワークショップ","第12回 回路とシステム(軽井沢)ワークショップ論文集","電子情報通信学会",,,"pp. 415-420",1999,Apr.
"妹尾竜太郎,杉野暢彦,西原明法","インデックス付ＡＲ自動更新についてのアドレス配置手法",,"第14回ディジタル信号処理シンポジウム 講演論文集",,,,"pp. 633-638",1999,
"T. Haga,N. Sugino,A. Nishihara","Memory Address Allocation Method for an Indirect Addressing DSP with 2<sup>m</sup> Modulo Update Operations",,"Proceedings of 1999 International Symposium on Intelligent Signal Processing and Communication Systems",,,,"pp. 605-608",1999,
"N. Sugino,H. Funaki,A. Nishihara","Memory Address Allocation Method for a Indirect Addressing DSP with Considering Modification of Local Computational Order",,"Proceedings of ISCAS'99",,"Vol. III",,"  496-499",1999,
"Nakaba Kogure,Nobuhiko Sugino,Akinori Nishihara","DSP Memory Allocation Method for Indirect Addressing with Wide Range Update Operation by Multiple Registers","1998 Asia-Pacific Conference on Circuits and Systems","1998 Asia-Pacific Conference on Circuits and Systems","IEEE",,,"pp. 435-438",1998,Nov.
"杉野暢彦,船木春重,西原明法","間接アドレッシングでのメモリ配置も考慮したDSPコード最適化手法","第13回ディジタル信号処理シンポジウム","第13回ディジタル信号処理シンポジウム講演論文集","電子情報通信学会",,,"pp. 591-596",1998,Nov.
"小暮 央,杉野暢彦,西原明法","更新レンジの広い複数アドレスレジス タによる間接アドレッシングDSPのメモリアドレス配置手法","第11回  回路とシステム(軽井沢)ワークショップ","第11回  回路とシステム(軽井沢)ワークショップ論文集","電子情報通信学会",,,"pp. 457-462",1998,Apr.
"Nakaba Kogure,NOBUHIKO SUGINO,Akinori Nishihara","Memory Allocation Method for Indirect Addressing DSPs with ±2 Update Operations",,"IEICE Trans. Fundamentals.",,"Vol. E81-A","No. 3","pp. 420-428",1998,Mar.
"NOBUHIKO SUGINO","Design of FIR・Filter Banks with Rational Sampling Factors",,"Proceedings of 1998 IEEE Asia-Pacific Conference on Circuits and Systems",,,,"pp. 69-72",1998,
"杉野暢彦,西原明法","モジュロー更新を考慮した間接アドレッシングのためのメモリ配置方法","第12回ディジタル信号処理シンポジウム","第12回ディジタル信号処理シンポジウム講演論文集","電子情報通信学会",,,"pp. 633-638",1997,Nov.
"Nakaba Kogure,Nobuhiko Sugino,Akinori Nishihara","Memory Address Allocation Method for a DSP with +-2 Update Operations in Indirect Addressing","European Conference on Circuit Theory and Design","European Conference on Circuit Theory and Design","IEEE",,,"  1446-1451",1997,Sept.
"Nobuhiko Sugino,A. Shimamura,Akinori Nishihara","Code Optimization Techniques based on Computational Re-Ordering and their Application to C-language Compiler for Pipelined DSPs","1997 International Technical Conference on Circuits/Systems,Computers and Communications","1997 International Technical Conference on Circuits/Systems,Computers and Communications","IEEE",,,"pp. 429-432",1997,July
"Nobuhiko Sugino,Akinori Nishihara","Memory Allocation Methods for a DSP with Indirect Addressing Modes and their Application to Compilers","International Symposium on Circuits and Systems '97","International Symposium on Circuits and Systems '97","IEEE",,,"pp. 2585-2588",1997,June
"小暮 央,杉野暢彦,西原明法","アドレスレジスタの±2以内の更新命令によるアドレス配置の最適化手法","第10回 回路とシステム軽井沢ワークショップ","第10回 回路とシステム軽井沢ワークショップ論文集","電子情報通信学会",,,"pp. 403-408",1997,Apr.
"杉野暢彦","モジュロー更新を考慮した間接アドレッシングのためのメモリ配置手法",,"第12回ディジタル信号処理シンポジウム講演論文集",,,,"pp. 633-638",1997,
"NOBUHIKO SUGINO,Hironobu Miyazaki,AKINORI NISHIHARA","DSP Code Optimization Methods Utilizing Addressing Operations at the Codes without Memory Accesses",,"IEICE Trans. Fundamentals.",,"Vol. E80-A","No. 12","pp. 2562-2571",1997,
"Nobuhiko Sugino,Jirasuk Vilasdechanon,Kiti Likit-Anurucks,Akinori Nishihara","Computational Ordering of Adaptive Digital Networks under Pipeline Constraints and Its Application to DSP Compilers","IEEE Asia Pacific Conference on Circuits and Systems ' 96","IEEE Asia Pacific Conference on Circuits and Systems ' 96","IEEE",,,"pp. 101-104",1996,Nov.
"杉野暢彦,西原明法","メモリアドレッシング最適化の改善とそのDSPコンパイラへの応用","第11回ディジタル信号処理シンポジウム","第11回ディジタル信号処理シンポジウム講演論文集","電子情報通信学会",,,"pp. 693-698",1996,Nov.
"N.Sugino,S. Iimuro,AKINORI NISHIHARA,N. Fujii","DSP Code Optimization Utilizing Memory Addressing Operation",,"IEICE Trans. Fundamentals.",,"Vol. E79-A","No. 8","pp. 1217-1223",1996,Aug.
"杉野暢彦,宮崎裕信,西原明法","DSPコード最適化におけるメモリ配置の改良","電子情報通信学会基礎・境界ソサイエティ大会","電子情報通信学会基礎・境界ソサイエティ大会論文集","電子情報通信学会",,,"  A-105",1996,Aug.
"Nobuhiko Sugino,S. Yoshida,Akinori Nishihara","Code Optimization Method for DSP's with Multiple Memory Addressing Registers and its Application to Compilers","IEEE TENCON '96","IEEE TENCON '96","IEEE",,,"pp. 619-624",1996,June
"Nobuhiko Sugino,H. Miyazaki,Satoshi Iimuro,Akinori Nishihara","Improved Code Optimization Method Utilizing Memory Addressing Operation and its Application to DSP Compiler","1996 International Symposium on Circuits and Systems","International Symposium on Circuits and Systems","IEEE",,,"pp. II-249-252",1996,May
"杉野暢彦,吉田征一朗,西原明法","複数アドレスレジスタについてのメモリアドレッシングの最適化一手法","回路とシステム・VLSI設計技術・デジタル信号処理研究会","電子情報通信学会技術研究報告","電子情報通信学会",,,"  CAS96-24/VLD96-24/DSP96-44",1996,May
"NOBUHIKO SUGINO","Computational Ordering of Adaptive Digital Networks under Pipeline Constrainst and its Application to DSP Compilers",,"Proc. Asia-Pacific Conference on Circuits and Systems",,,,"pp. 101-104",1996,
"NOBUHIKO SUGINO","Improved Code Optimization Method Utilizing Memory Addressing Operation and its Application to DSP Compiler",,"Proceedings of International Symposium on Circuits and Systems 1996",,,,"pp. 249-252",1996,
"杉野暢彦,西原明法","DSPコード自動生成におけるメモリアドレシング最適化","第10回ディジタル信号処理シンポジウム","第10回ディジタル信号処理シンポジウム講演論文集","電子情報通信学会",,,"pp. 325-330",1995,Nov.
"NOBUHIKO SUGINO,Seiji Ohbi,AKINORI NISHIHARA","DSP Compiler for Matrix and Vector Expressions with Automatic Computational Ordering",,"IEICE Trans. Fundamentals",,"Vol. E78-A","No. 8","pp. 989-995",1995,Aug.
"杉野暢彦,宮崎裕信,西原明法","メモリアクセスのないコードも考慮したメモリアドレッシング最適化とDSPコード自動生成","回路とシステム・VLSI設計技術・デジタル信号処理研究会","電子情報通信学会技術研究報告","電子情報通信学会",,,"  CAS95-19/VLD95-19/DSP95-51",1995,June
"Jirasuk Vilasdechanon,Nobuhiko Sugino,Kiti Likit-Anurucks,Akinori Nishihara","Architecture Driven Computational Ordering and Code Generation Method for DSP Compiler","1994 Asia Pacific Conference on Circuits and Systems","Asia Pacific Conference on Circuits and Systems","IEEE",,,"pp. 157-161",1994,Dec.
"Satoshi Iimuro,Nobuhiko Sugino,Akinori Nishihara,Nobuo Fujii","Code Optimization Method Utilizing Memory Addressing Operation and Its Application to DSP Compiler","1994 Asia Pacific Conference on Circuits and Systems","Asia Pacific Conference on Circuits and Systems","IEEE",,,"pp. 151-156",1994,Dec.
"飯室聡,杉野暢彦,西原明法,藤井信生","メモリアドレッシングの最適化とDSPコード自動生成","回路とシステム、ＶＬＳＩ設計技術、デジタル信号処理研究会","電子情報通信学会技術研究報告","電子情報通信学会",,,"  CAS94-32/VLD94-32/DSP94-54",1994,June
"NOBUHIKO SUGINO","Architecture Driven Computational Ordering and Code Generation Method for DSP Compiler",,"1994 IEEE ASIA-PACIFIC CONFERENCE ON CIRCUIT AND SYSTEMS PROCEEDINGS",,,,,1994,
"NOBUHIKO SUGINO","Code Optimization Method Utilizing Memory Addressing Operation and its Application to DSP Compiler",,"1994 IEEE ASIA-PACIFIC CONFERENCE ON CIRCUIT AND SYSTEMS PROCEEDINGS",,,,,1994,
"NOBUHIKO SUGINO,Koji Tamura,AKINORI NISHIHARA","DSP Code Optimization by Use of Code Compression Method Based on Neural Network","第8回ディジタル信号処理シンポジウム","第8回ディジタル信号処理シンポジウム講演論文集","電子情報通信学会",,,"pp. 29-34",1993,Oct.
"Jirasuk Vilasdechanon,Nobuhiko Sugino,Kiti Likit-Anurucks,Akinori Nishihara","Improved Computational Ordering Method forDSP Compiler to Minimize Latency","1992 Asia Pacific Conference on Circuits and Systems","Asia Pacific Conference on Circuits and Systems","IEEE",,,"pp. 112-115",1992,Dec.
"飯室 聡,杉野暢彦,西原明法,藤井信生","DSPのメモリアドレッシングを活用したコード最適化方法とコンパイラへの応用","1992年電子情報通信学会秋季大会","1992年電子情報通信学会秋季大会講演論文集","電子情報通信学",,"  A-104","p. 1-105",1992,Sept.
"杉野暢彦","信号処理システムの計算順序決定法とDSPコード自動生成に関する研究",,,,,,,1992,
"Nobuhiko Sugino,Seiji Ohbi,Akinori Nishihara","DSP Compiler for Matrix/Vector Expressions with Automatic Computational Ordering","1991 European Conference on Circuit Theory and Design","European Conference on Circuit Theory and Design","the European Circuit Society ,IEEE",,,"pp. 669-678",1991,Sept.
"Jirasuk Vilasdechanon,Nobuhiko Sugino,Kiti Likit-Anurucks,Akinori Nishihara","Computational Ordering of Adaptive Digital Networks","1991 International Symposium on Circuits and Systems","1991 International Symposium on Circuits and Systems",,,,"pp. 29-32",1991,June
"Nobuhiko Sugino,Akinori Nishihara","Frequency-Domain Simulator of Digital Networks from the Structural Description",,"Transactions of the IEICE","IEICE","Vol. E73","No. 11","pp. 1804-1806",1990,Nov.
"王尾誠司,杉野暢彦,西原明法","DSPによる信号処理の実現に適したコンパイラシステムの開発","第5回ディジタル信号処理シンポジウム","第5回ディジタル信号処理シンポジウム講演論文集","電子情報通信学会",,,"  B-3-4",1990,Nov.
"杉野暢彦,西原明法","ディジタルフィルタの構造記述からの周波数領域シミュレータ","1990年電子情報通信学会秋季全国大会","1990年電子情報通信学会秋季全国大会","電子情報通信学会",,"  A-112","  1-112-113",1990,Sept.
"王尾誠司,杉野暢彦,西原明法","記憶資源の有効利用を図ったDSPコードの自動生成","第4回ディジタル信号処理シンポジウム","電子情報通信学会技術研究報告","電子情報通信学会",,,"pp. 37-41,",1989,Dec.
"NOBUHIKO SUGINO,Seiji Ohbi,AKINORI NISHIHARA","Computational Ordering of Digital Networks under Pipeline Constraints and its Application to DSP Compilers",,"Transactions of IEICE",,"Vol. E72","No. 12","pp. 1299-1306",1989,Dec.
"Nobuhiko Sugino,Seiji Ohbi,Akinori Nishihara","Computational Ordering of Digital Networks under Pipeline Constraints and its Application to Compiler for DSPs","European Conference on Circuit Theory and Design","European Conference on Circuit Theory and Design","the Patronage of the European Circuit Society",,,"pp. 395-399",1989,Sept.
"杉野暢彦,王尾誠司,西原明法","パイプラインを有するDSPに適したディジタルフィルタ計算順序の決定法とそれを応用したコンパイラ","第2回回路とシステム軽井沢ワークショップ","第2回回路とシステム軽井沢ワークショップ","電子情報通信学会",,,"pp. 108-115",1989,May
"杉野暢彦,王尾誠司,西原明法","計算順序決定法の改良とDSPコンパイラへの応用(μPD7720, μPD7725, TMS32010, TMS32020)","回路とシステム研究会","電子情報通信学会技術研究報告","電子情報通信学会",,,"  CAS88-139",1989,Mar.
"杉野暢彦",,,,,,,,1989,
"杉野暢彦,年清昭彦,渡部英二,西原明法","ディジタル信号処理回路の計算順序決定とそのシグナルプロセッサ用コンパイラへの応用",,"電子情報通信学会論文誌(A)","電子情報通信学会","Vol. J71-A","No. 2","pp. 327-335",1988,Feb.
"杉野暢彦,西原明法,渡部英二","第二世代DSP用コンパイラシステム--- 第1世代DSP用コンパイラシステムDIMPLの改良へのアプローチ","回路とシステム研究会","電子情報通信学会技術研究報告","電子情報通信学会",,,"  CAS87-4",1987,Apr.