"Yiqiang Sheng,Atsushi Takahashi","A Novel High-Performance Heuristic Algorithm with Application to Physical Design Optimization",,"IEICE Trans. Fundamentals",,"Vol. E97-A","No. 12","pp. 2418-2426",2014,Dec.
"Yiqiang Sheng","High-Performance Heuristics with Applications to 2D/3D IC Physical Design Optimization",,,,,,,2014,July
"Yiqiang Sheng","High-Performance Heuristics with Applications to 2D/3D IC Physical Design Optimization",,,,,,,2014,July
"Yiqiang Sheng","High-Performance Heuristics with Applications to 2D/3D IC Physical Design Optimization",,,,,,,2014,July
"Yiqiang Sheng,Atsushi Takahashi","A New Variation of Adaptive Simulated Annealing for 2D/3D Packing Optimization",,"IPSJ Trans. on System LSI Design Methodology",,"Vol. 6",,"pp. 94-100",2013,Aug.
"Yiqiang Sheng,Atsushi Takahashi","A Simulated Annealing Based Approach to Integrated Circuit Layout Design",,"Simulated Annealing - Single and Multiple Objective Problems","InTech",,,"pp. 239-260",2012,Oct.
"Yiqiang Sheng,Atsushi Takahashi,Shuichi Ueno","2-Stage Simulated Annealing with Crossover Operator for 3D-Packing Volume Minimization",,"Proc. the 17th Workshop on Synthesis And System Integration of Mixed Information technologies (SASIMI 2012)",,,,"pp. 227-232",2012,Mar.
"Yiqiang Sheng,Atsushi Takahashi,Shuichi Ueno","An Improved Simulated Annealing for 3D Packing with Sequence Triple and Quintuple Representations","Technical Committee on VLSI Design Technologies","IEICE Technical Report (VLD2011-88)",,"Vol. 111","No. 324","pp. 209-214",2011,Nov.
"Yiqiang Sheng,Atsushi Takahashi,Shuichi Ueno","RRA-Based Multi-Objective Optimization to Mitigate the Worst Cases of Placement",,"Proc. IEEE 9th International Conference on ASIC (ASICON 2011)",,,,"pp. 357-360",2011,Oct.
"Yiqiang Sheng,Atsushi Takahashi,Shuichi Ueno","MSA: Mixed Stochastic Algorithm for Placement with Larger Solution Space","Technical Committee on VLSI Design Technologies","IEICE Technical Report (VLD2011-42)",,"Vol. 111","No. 216","pp. 11-16",2011,Sept.
"Yiqiang Sheng,Atsushi Takahashi,Shuichi Ueno","A Stochastic Optimization Method to Solve General Placement Problem Effectively",,"Proc. DA Symposium 2011, IPSJ Symposium Series",,"Vol. 2011","No. 5","pp. 27-32",2011,Aug.
"Yiqiang Sheng,Atsushi Takahashi,Shuichi Ueno","Relay-Race Algorithm: A Novel Heuristic Approach to VLSI/PCB Placement",,"Proc. IEEE Computer Society Annual Symposium on VLSI (ISVLSI 2011)",,,,"pp. 96-101",2011,July