"Hanli Liu,Zheng Sun,Hongye Huang,Wei Deng,Teerachot Siriburanon,Jian Pang,Yun Wang,Rui Wu,Teruki Someya,Atsushi Shirane,Kenichi Okada","A 265-?W Fractional-N Digital PLL with Seamless Automatic Switching Sub-sampling/Sampling Feedback Path and Duty-Cycled Frequency-Locked Loop in 65nm CMOS",,"IEEE Journal of Solid-State Circuits (JSSC)",,"Vol. 54","No. 12","pp. 3478-3492",2019,Dec.
"Hans Herdian,Haosheng Zhang,Aravind Tharayil Narayanan,Atsushi Shirane,Kenichi Okada","10GHz Varactor-less VCO with Helium-3 Ion Irradiated Inductor","IEEE Asia-Pacific Microwave Conference (APMC)",,,,,,2019,Dec.
"大野奎悟,坂本啓,大熊政明,岡田健一,白根篤史,戸村崇,Dongwon You","フレキシブル基板を搭載した宇宙展開織物膜構造の収納性","第５回宇宙太陽発電(SSPS)シンポジウム",,,,,,2019,Nov.
"大野 奎悟,坂本 啓,大熊 政明,岡田 健一,白根 篤史,戸村 崇,Dongwon You","織物膜宇宙構造の収納性に関する研究","宇宙太陽発電シンポジウム",,,,,,2019,Nov.
"Haosheng Zhang,Herdian Hans,Tn Aravind,Atsushi Shirane,Mitsuru Suzuki,Kazuhiro Harasaka,Kazuhiko Adachi,Shigeyoshi Goka,Shinya Yanagimachi,Kenichi Okada","ULPAC: A Miniaturized Ultralow-Power Atomic Clock",,"IEEE Journal of Solid-State Circuits (JSSC)",,"Vol. 54","No. 11","pp. 3135-3148",2019,Nov.
"Jian Pang,Korkut Kaan Tokgoz,白根 篤史,岡田 健一","A 60GHz Bi-Directional Transceiver for IEEE 802.11ay","電子情報通信学会 ソサイエティ大会",,,,,,2019,Sept.
"Bangan Liu,Yuncheng Zhang,Junjun Qiu,Wei Deng,Zule Xu,Haosheng Zhang,Jian Pang,Yun Wang,Rui Wu,染谷 晃基,白根 篤史,岡田 健一","A 21.7% System Power Efficiency Fully-Synthesizable Transmitter for sub-GHz IoT Applications","電子情報通信学会 ソサイエティ大会",,,,,,2019,Sept.
"Junjun Qiu,Bangan Liu,Yuncheng Zhang,染谷 晃基,白根 篤史,岡田 健一","Digital Baseband Design for Sub-GHz Transceiver","電子情報通信学会 ソサイエティ大会",,,,,,2019,Sept.
"Hongye Huang,Hanli Liu,Zheng Sun,Dingxin Xu,染谷 晃基,白根 篤史,岡田 健一","A 2.4GHz Low-Power Subsampling/Sampling-Mixed Fractional-N All-Digital PLL","電子情報通信学会 ソサイエティ大会",,,,,,2019,Sept.
"Dingxin Xu,Zheng Sun,Hongye Huang,染谷 晃基,白根 篤史,岡田 健一","A Time-Amplifier Gain Calibration Technique for ADPLL","電子情報通信学会 ソサイエティ大会",,,,,,2019,Sept.
"Haosheng Zhang,Hans Herdian,白根 篤史,岡田 健一","0.2mW 70fs Jitter Injection Locked PLL","電子情報通信学会 ソサイエティ大会",,,,,,2019,Sept.
"Zheng Sun,Dingxin Xu,Hongye Huang,染谷 晃基,白根 篤史,岡田 健一","A 78fs RMS Jitter Injection-Locked Clock Multiplier Using Transformer-Based Ultra-Low-Power VCO","電子情報通信学会 ソサイエティ大会",,,,,,2019,Sept.
"柳澤 潔,田村 比呂,白根 篤史,岡田 健一","深層学習による無線端末同定および分類","電子情報通信学会 ソサイエティ大会",,,,,,2019,Sept.
"Zheng Li,Jian Pang,Xueting Luo,白根 篤史,岡田 健一","Millimeter-wave CMOS Differential Bi-directional Amplifier for 5G Communication","電子情報通信学会 ソサイエティ大会",,,,,,2019,Sept.
"ラク セツテイ,Pang Jian,Li Zheng,白根 篤史,岡田 健一","第5世代移動通信システムに向けた28GHz帯双方向増幅器","電子情報通信学会 ソサイエティ大会",,,,,,2019,Sept.
"Chun Wang,Ibrahim Abdo,白根 篤史,岡田 健一","A 22.7dB Three-stage D-band Power Amplifier in 65nm CMOS","電子情報通信学会 ソサイエティ大会",,,,,,2019,Sept.
"Ibrahim Abdo,Korkut Kaan Tokgoz,藤村 拓弥,Jian Pang,白根 篤史,岡田 健一","CMOS Transistor Layout Optimization for Sub-THz Amplifier Design","電子情報通信学会 ソサイエティ大会",,,,,,2019,Sept.
"川口 敦広,Wang Yun,You Dongwon,中村 岳資,Fadila Ashbir Aviat,白根 篤史,岡田 健一","妨害波抑圧回路を用いたKa帯衛星通信向けCMOS受信機","電子情報通信学会 ソサイエティ大会",,,,,,2019,Sept.
"Dongwon You,Yun Wang,白根 篤史,岡田 健一","A Ka Band Intermodulation-Interference-Tolerant Receiver Design for Earth Station in Satellite Communication","電子情報通信学会 ソサイエティ大会",,,,,,2019,Sept.
"Zixin Chen,Jian Pang,Yun Wang,白根 篤史,岡田 健一","A High-Resolution LO Phase Shifter with Reduced Gain Variation at LO Path for 5G NR","電子情報通信学会 ソサイエティ大会",,,,,,2019,Sept.
"黄 中梁,Pang Jian,白根 篤史,岡田 健一","60GHz帯のLOリークとI/Qミスマッチ校正できる双方向ミキサ","電子情報通信学会 ソサイエティ大会",,,,,,2019,Sept.
"Zheng Sun,Hanli Liu,Dingxin Xu,Hongye Huang,Bangan Liu,Zheng Li,Jian Pang,Teruki Someya,Atsushi Shirane,Kenichi Okada","A 78fs RMS Jitter Injection-Locked Clock Multiplier Using Transformer-Based Ultra-Low-Power VCO","IEEE European Solid-State Circuits Conference (ESSCIRC)",,,,,,2019,Sept.
"ｱﾙｳﾞｨﾝ ｼﾞｮｼｭｱ,Pang Jian,白根 篤史,岡田 健一","ミリ波無線機に向けた局部発振信号生成用高次高調波抑圧6倍周波数逓倍器","電子情報通信学会 ソサイエティ大会",,,,,,2019,Sept.
"Xiaofan Gu,Jian Pang,白根 篤史,岡田 健一","Link Budget Design for 5G 28GHz Phased-Array Transceiver","電子情報通信学会 ソサイエティ大会",,,,,,2019,Sept.
"Rattanan Saengchan,Jian Pang,Dongwon You,Ashbir Aviat Fadila,Joshua Alvin,Rui Wu,Yun Wang,白根 篤史,岡田 健一","A High-Accuracy Calibration Circuit for Large-Sized 5G Phased-Array Transceiver","電子情報通信学会 ソサイエティ大会",,,,,,2019,Sept.
"Yun Wang,Dongwon You,Rattanan Saengchan,白根 篤史,岡田 健一","A 39GHz CMOS Phased-Array Transmitter for 5G NR with LOFT Auto-Cancellation","電子情報通信学会 ソサイエティ大会",,,,,,2019,Sept.
"Haosheng Zhang,Aravind Tharayil Narayanan,Hans Herdian,Bangan Liu,Yun Wang,Atsushi Shirane,Kenichi Okada","0.2mW 70fsrms-Jitter Injection-Locked PLL Using De-Sensitized SSPD-Based Injecting-Time Self-Alignment Achieving -270dB FoM and -66dBc Reference Spur","IEEE SSCS Japan Chapter VLSI Circuits報告会",,,,,,2019,July
"Yun Wang,Rui Wu,Jian Pang,Dongwon You,Ashbir Aviat Fadila,Rattanan Saengchan,Xi Fu,Daiki Matsumoto,Takeshi Nakamura,Ryo Kubozoe,Masaru Kawabuchi,Bangan Liu,Haosheng Zhang,Junjun Qiu,Hanli Liu,Naoki Oshima,Keiichi Motoi,Shinichi Hori,Kazuaki Kunihiro,Tomoya Kaneko,Atsushi Shirane,Kenichi Okada","A 39GHz Phased-Array CMOS Transceiver with Built-in Calibration for Large-Array 5G NR","IEEE Radio Frequency Integrated Circuits Symposium (RFIC)",,,,,,2019,June
"Haosheng Zhang,Aravind Tharayil Narayanan,Hans Herdian,Bangan Liu,Yun Wang,Atsushi Shirane,Kenichi Okada","0.2mW 70fsrms-Jitter Injection-Locked PLL Using De-Sensitized SSPD-Based Injecting-Time Self-Alignment Achieving -270dB FoM and -66dBc Reference Spur","IEEE Symposium on VLSI Circuits (VLSI Circuits)",,,,,,2019,June
"Zheng Sun,Hanli Liu,Dexian Tang,Hongye Huang,金子 徹,Rui Wu,Wei Deng,染谷 晃基,白根 篤史,岡田 健一","A T/R Switch Embedded BLE Transceiver with 2.6mW Harmonic-Suppressed Transmitter and 2.3mW Hybrid-Loop Receiver」,","電子情報通信学会 LSIとシステムのワークショップ",,,,,,2019,May
"Haosheng Zhang,Hans Herdian,Aravind Tharayil Narayanan,白根 篤史,鈴木 暢,原坂 和宏,安達 一彦,柳町 真也,岡田 健一","An ultra-low-power atomic clock based on CMOS probing and locking loop","電子情報通信学会 LSIとシステムのワークショップ",,,,,,2019,May
"Zheng Li,Jian Pang,窪添 諒,Xueting Luo,Rui Wu,Yun Wang,Dongwon You,Ashbir Aviat Fadila,Rattanan Saengchan,中村 岳資,Joshua Alvin,松本 大輝,Aravind Tharayil Narayanan,Bangan Liu,白根 篤史,岡田 健一","A 28GHz CMOS Phased-Array Beamformer with Bi-Directional Technique for 5G NR","電子情報通信学会 LSIとシステムのワークショップ",,,,,,2019,May
"Dingxin Xu,Hanli Liu,Zheng Sun,Hongye Huang,Wei Deng,Teerachot Siriburanon,Jian Pang,Yun Wang,Rui Wu,染谷 晃基,白根 篤史,岡田 健一","A 265-?W Fractional-N Digital PLL with Switching Subsampling/Sampling Feedback","電子情報通信学会 LSIとシステムのワークショップ",,,,,,2019,May
"Ibrahim Abdo,Takuya Fujimura,Tsuyoshi Miura,Atsushi Shirane,Kenichi Okada","A 300GHz Dielectric Lens Antenna","IEEE Global Symposium on Millimeter Waves (GSMM)",,,,,"pp. 17-19",2019,May
"Jian Pang,Rui Wu,Yun Wang,Masato Dome,Hisashi Kato,Hongye Huang,Tn Aravind,Hanli Liu,Bangan Liu,Takeshi Nakamura,Takuya Fujimura,Masaru Kawabuchi,Ryo Kubozoe,Tsuyoshi Miura,Daiki Matsumoto,Zheng Li,Naoki Oshima,Keiichi Motoi,Shinichi Hori,Kazuaki Kunihiro,Tomoya Kaneko,Atsushi Shirane,Kenichi Okada","A 28GHz CMOS Phased-Array Transceiver Based on LO Phase Shifting Architecture with Gain Invariant Phase Tuning for 5G New Radio",,"IEEE Journal of Solid-State Circuits (JSSC)",,"Vol. 54","No. 5","pp. 1228-1242",2019,May
"Jian Pang,Shotaro Maki,Seitaro Kawai,Noriaki Nagashima,Yuuki Seo,Masato Dome,Hisashi Kato,Makihiko Katsuragi,Kento Kimura,Satoshi Kondo,Yuki Terashima,Hanli Liu,Teerachot Siriburanon,Tn Aravind,Nurul Fajri,Tohru Kaneko,Toru Yoshioka,Bangan Liu,Yun Wang,Rui Wu,Ning Li,Korkut Kaan Tokgoz,Masaya Miyahara,Atsushi Shirane,Kenichi Okada","A 50.1Gb/s 60-GHz CMOS Transceiver for IEEE 802.11ay with Calibration of LO Feed-Through and I/Q Imbalance",,"IEEE Journal of Solid-State Circuits (JSSC)",,"Vol. 54","No. 5","pp. 1375-1390",2019,May
"Haosheng Zhang,Tn Aravind,Hans Herdian,Bangan Liu,Rui Wu,Atsushi Shirane,Kenichi Okada","A Power-Efficient Pulse-VCO for Chip-Scale Atomic Clock",,"IEICE Transactions on Electronics",,"Vol. E102-C","No. 4","pp. 276-286",2019,Apr.
"Bangan Liu,Yuncheng Zhang,Junjun Qiu,Wei Deng,Zule Xu,Haosheng Zhang,Jian Pang,Yun Wang,Rui Wu,Teruki Someya,Atsushi Shirane,Kenichi Okada","An HDL-described Fully-synthesizable Sub-GHz IoT Transceiver with Ring Oscillator Based Frequency Synthesizer and Digital Background EVM Calibration","IEEE Custom Integrated Circuits Conference (CICC)",,,,,,2019,Apr.
"Zheng Sun,Hanli Liu,Dexian Tang,Hongye Huang,Tohru Kaneko,Rui Wu,Wei Deng,Teruki Someya,Atsushi Shirane,Kenichi Okada","A 0.85mm2 BLE Transceiver with Embedded T/R Switch, 2.6mW Fully-Passive Harmonic Suppressed Transmitter and 2.3mW Hybrid-Loop Receiver","電子情報通信学会 集積回路研究会",,,"Vol. ICD2018-115","No. 507","pp. 81-85",2019,Mar.
"Hongye Huang,Hanli Liu,Zheng Sun,Teruki Someya,Atsushi Shirane,Kenichi Okada","An Energy-Saving Digital-to-Time Converter for Ultra-Low-Power Digital PLLs","電子情報通信学会 集積回路研究会",,,"Vol. ICD2018-116","No. 507","pp. 87-91",2019,Mar.
"Pang Jian,Zheng Li,Ryo Kubozoe,Xueting Luo,Rui Wu,Yun Wang,Dongwon You,Ashbir Aviat Fadila,Rattanan Saengchan,Takeshi Nakamura,Joshua Alvin,Daiki Matsumoto,Tn Aravind,Bangan Liu,Hanli Liu,Zheng Sun,Hongye Huang,Korkut Kaan Tokgoz,大島 直樹,元井 桂一,堀 真一,國弘 和明,Tomoya Kaneko,Atsushi Shirane,Kenichi Okada","A 28GHz CMOS Phased-Array Beamformer Utilizing Neutralized Bi-Directional Technique Supporting Dual-Polarized MIMO for 5G NR","IEEE SSCS Japan Chapter ISSCC報告会",,,,,,2019,Mar.
"Bangan Liu,Yuncheng Zhang,Junjun Qiu,Teruki Someya,Atsushi Shirane,Kenichi Okada","A Fully-synthesizable Ring Oscillator Based Frequency Synthesizer for Sub-GHz IoT Application","電子情報通信学会 集積回路研究会",,,"Vol. ICD2018-112","No. 507","pp. 67-71",2019,Mar.
"Haosheng Zhang,Hans Herdian,Tn Aravind,Atsushi Shirane,Nobue Suzuki,原坂 和宏,安達 一彦,Shinya Yanagimach,Kenichi Okada","Ultra-Low-Power Atomic Clock for Satellite Constellation with 2.2x10-12 Long-Term Allan Deviation Using Cesium Coherent Population Trapping","IEEE SSCS Japan Chapter ISSCC報告会",,,,,,2019,Mar.
"Junjun Qiu,Bangan Liu,Yuncheng Zhang,Teruki Someya,Atsushi Shirane,Kenichi Okada","A Fully-synthesizable Symbol Timing Recovery Circuit for Low-Power Wireless Receiver","電子情報通信学会 集積回路研究会",,,"Vol. ICD2018-113","No. 507","pp. 73-76",2019,Mar.
"Yuncheng Zhang,Bangan Liu,Junjun Qiu,Teruki Someya,Atsushi Shirane,Kenichi Okada","A Low-Power Area Efficient Sub-GHz IoT Receiver without Off-Chip Components","電子情報通信学会 集積回路研究会",,,"Vol. ICD2018-114",,"pp. 77-80",2019,Mar.
"白根 篤史,岡田 健一","無線受信ICにおける妨害波を考慮した回路仕様設計","電子情報通信学会 集積回路研究会",,,"Vol. ICD2018-105","No. 507","pp. 27-29",2019,Mar.
"Hanli Liu,Zheng Sun,Hongye Huang,Wei Deng,Teerachot Siriburanon,Pang Jian,Yun Wang,Rui Wu,染谷 晃基,Atsushi Shirane,Kenichi Okada","A 265-?W Fractional-N Digital PLL with Seamless Automatic Switching Subsampling/Sampling Feedback Path and Duty-Cycled Frequency-Locked Loop in 65nm CMOS","IEEE SSCS Japan Chapter ISSCC報告会",,,,,,2019,Mar.
"Jian Pang,Zheng Li,窪添 諒,Xueting Luo,Rui Wu,Yun Wang,Dongwon You,Ashbir Aviat Fadila,Rattanan Saengchan,中村 岳資,Joshua Alvin,松本 大輝,THARAYILNAARAVIND,Bangan Liu,Junjun Qiu,Hanli Liu,Zheng Sun,Hongye Huang,白根 篤史,岡田 健一","双方向動作可能な5GNR二偏波MIMO対応28GHz帯CMOSフェーズドアレイ無線機","電子情報通信学会 集積回路研究会",,,"Vol. ICD2018-106","No. 507","pp. 31-35,",2019,Mar.
"Hanli Liu,Zheng Sun,Hongye Huang,Wei Deng,Teerachot Siriburanon,Jian Pang,Yun Wang,Rui Wu,Teruki Someya,Atsushi Shirane,Kenichi Okada","A 265-?W Fractional-N Digital PLL with Seamless Automatic Switching Subsampling/Sampling Feedback Path and Duty-Cycled Frequency-Locked Loop in 65nm CMOS","IEEE International Solid-State Circuits Conference (ISSCC)",,,,,"pp. 256-257",2019,Feb.
"Jian Pang,Zheng Li,Ryo Kubozoe,Xueting Luo,Rui Wu,Yun Wang,Dongwon You,Ashbir Aviat Fadila,Rattanan Saengchan,Takeshi Nakamura,Joshua Alvin,Daiki Matsumoto,Tn Aravind,Bangan Liu,Hanli Liu,Zheng Sun,Hongye Huang,Korkut Kaan Tokgoz,Naoki Oshima,Keiichi Motoi,Shinichi Hori,Kazuaki Kunihiro,Tomoya Kaneko,Atsushi Shirane,Kenichi Okada","A 28GHz CMOS Phased-Array Beamformer Utilizing Neutralized Bi-Directional Technique Supporting Dual-Polarized MIMO for 5G NR","IEEE International Solid-State Circuits Conference (ISSCC)",,,,,"pp. 344-345",2019,Feb.
"Haosheng Zhang,Hans Herdian,Tn Aravind,Atsushi Shirane,Mitsuru Suzuki,Kazuhiro Harasaka,Kazuhiko Adachi,Shinya Yanagimachi,Kenichi Okada","Ultra-Low-Power Atomic Clock for Satellite Constellation with 2.2x10-12 Long-Term Allan Deviation Using Cesium Coherent Population Trapping","IEEE International Solid-State Circuits Conference (ISSCC)",,,,,"pp. 462-463",2019,Feb.
"Bangan Liu,Huy Cu Ngo,Kengo Nakata,Wei Deng,Yuncheng Zhang,Junjun Qiu,Toru Yoshioka,Jun Emmei,Jian Pang,Tn Aravind,Haosheng Zhang,Dongsheng Yang,Hanli Liu,Teruki Someya,Atsushi Shirane,Kenichi Okada","A 0.4ps-Jitter -52dBc-Spur Synthesizable Injection-locked PLL with Self-clocked Non-overlap Update and Slope-balanced Sub-sampling BBPD",,"IEEE Solid-State Circuits Letters (SSC-L)",,"Vol. 2","No. 1","pp. 5-8",2019,Jan.