@book{CTT100644990, author = {Yiqiang Sheng and Atsushi Takahashi}, title = {A Simulated Annealing Based Approach to Integrated Circuit Layout Design}, publisher = {InTech}, year = 2012, } @article{CTT100679035, author = {Yiqiang Sheng and Atsushi Takahashi}, title = {A Novel High-Performance Heuristic Algorithm with Application to Physical Design Optimization}, journal = {IEICE Trans. Fundamentals}, year = 2014, } @article{CTT100668899, author = {Yiqiang Sheng and Atsushi Takahashi}, title = {A New Variation of Adaptive Simulated Annealing for 2D/3D Packing Optimization}, journal = {IPSJ Trans. on System LSI Design Methodology}, year = 2013, } @inproceedings{CTT100642030, author = {Yiqiang Sheng and Atsushi Takahashi and Shuichi Ueno}, title = {2-Stage Simulated Annealing with Crossover Operator for 3D-Packing Volume Minimization}, booktitle = {Proc. the 17th Workshop on Synthesis And System Integration of Mixed Information technologies (SASIMI 2012)}, year = 2012, } @inproceedings{CTT100642019, author = {Yiqiang Sheng and Atsushi Takahashi and Shuichi Ueno}, title = {An Improved Simulated Annealing for 3D Packing with Sequence Triple and Quintuple Representations}, booktitle = {IEICE Technical Report (VLD2011-88)}, year = 2011, } @inproceedings{CTT100642014, author = {Yiqiang Sheng and Atsushi Takahashi and Shuichi Ueno}, title = {RRA-Based Multi-Objective Optimization to Mitigate the Worst Cases of Placement}, booktitle = {Proc. IEEE 9th International Conference on ASIC (ASICON 2011)}, year = 2011, } @inproceedings{CTT100642022, author = {Yiqiang Sheng and Atsushi Takahashi and Shuichi Ueno}, title = {MSA: Mixed Stochastic Algorithm for Placement with Larger Solution Space}, booktitle = {IEICE Technical Report (VLD2011-42)}, year = 2011, } @inproceedings{CTT100642017, author = {Yiqiang Sheng and Atsushi Takahashi and Shuichi Ueno}, title = {A Stochastic Optimization Method to Solve General Placement Problem Effectively}, booktitle = {Proc. DA Symposium 2011, IPSJ Symposium Series}, year = 2011, } @inproceedings{CTT100642015, author = {Yiqiang Sheng and Atsushi Takahashi and Shuichi Ueno}, title = {Relay-Race Algorithm: A Novel Heuristic Approach to VLSI/PCB Placement}, booktitle = {Proc. IEEE Computer Society Annual Symposium on VLSI (ISVLSI 2011)}, year = 2011, } @misc{CTT100693531, author = {Yiqiang Sheng}, title = {High-Performance Heuristics with Applications to 2D/3D IC Physical Design Optimization}, year = 2014, } @misc{CTT100693473, author = {Yiqiang Sheng}, title = {High-Performance Heuristics with Applications to 2D/3D IC Physical Design Optimization}, year = 2014, } @misc{CTT100693402, author = {Yiqiang Sheng}, title = {High-Performance Heuristics with Applications to 2D/3D IC Physical Design Optimization}, year = 2014, } @phdthesis{CTT100693531, author = {Yiqiang Sheng}, title = {High-Performance Heuristics with Applications to 2D/3D IC Physical Design Optimization}, school = {東京工業大学}, year = 2014, } @phdthesis{CTT100693473, author = {Yiqiang Sheng}, title = {High-Performance Heuristics with Applications to 2D/3D IC Physical Design Optimization}, school = {東京工業大学}, year = 2014, } @phdthesis{CTT100693402, author = {Yiqiang Sheng}, title = {High-Performance Heuristics with Applications to 2D/3D IC Physical Design Optimization}, school = {東京工業大学}, year = 2014, }