"Takayuki Sekiguchi,Shuhei Amakawa,Noboru Ishihara,Kazuya Masu","Inductorless 8.9mW 25Gb/s 1:4 DEMUX and 4mW 13Gb/s 4:1 MUX in 90 nm CMOS",,"JOURNAL OF SEMICONDUCTOR TECHNOLOGY AND SCIENCE","JOURNAL OF SEMICONDUCTOR TECHNOLOGY AND SCIENCE","Vol. 10","No. 3","pp. 176 - 184",2010,Sept.
"Shigeto Suzuki Takayuki Sekiguchi Satoru Tanoi Shuhei Amakawa Noboru Ishihara Kazuya Masu,Takayuki Sekiguchi,Satoru Tanoi,Shuhei Amakawa,Noboru Ishihara,Kazuya Masu","A Study of High-Speed Low-Power MUX/DEMUX in chips","2010 年電子情報通信学会エレクトロニクスソサイエティ大会","2010 年電子情報通信学会エレクトロニクスソサイエティ大会","2010 年電子情報通信学会エレクトロニクスソサイエティ大会",,,"pp. 76",2010,Sept.
"Shigeto Suzuki,Takayuki Sekiguchi,Shuhei Amakawa,Noboru Ishihara,Kazuya Masu","A Study of MUX/DEMUX With Clocked Inverter Type D-FF","2010 年 電子情報通信学会総合大会","2010 年 電子情報通信学会総合大会","2010 年 電子情報通信学会総合大会",,,"pp. 135",2010,Mar.
"Takayuki Sekiguchi,Shuhei Amakawa,Noboru Ishihara,Kazuya Masu","On the validity of bisection-based thru-only de-embedding","2010 IEEE International Conference on Microelectronic Test Structures (ICMTS2010)","2010 IEEE International Conference on Microelectronic Test Structures (ICMTS2010)","2010 IEEE International Conference on Microelectronic Test Structures (ICMTS2010)",,,"pp. 66 - 71",2010,Mar.
"Takayuki Sekiguchi,Shuhei Amakawa,Noboru Ishihara,Kazuya Masu","An 8.9mW 25Gb/s Inductorless l：4 DEMUX in 90nm CMOS","International SoC Design Conference 2009","International SoC Design Conference 2009","International SoC Design Conference 2009",,,"pp. 404-407",2009,Nov.
"Takayuki Sekiguchi,Shuhei Amakawa,Noboru Ishihara,Kazuya Masu","4:1 MUX Design for On-Chip Serial Transmission","2009 年電子情報通信学会エレクトロニクスソサイエティ大会","2009 年電子情報通信学会エレクトロニクスソサイエティ大会","電子情報通信学会",,,"  C-12-52",2009,Sept.
"Takayuki Sekiguchi,Akiko Mineyama,Toshihide Suzuki,Hiroyuki Ito,Shuhei Amakawa,Noboru Ishihara,Kazuya Masu","90nmプロセスによる20Gb/sNear-Rail-to-Rail ロジック動作1:4 DEMUX","電子情報通信学会 シリコンアナログRF研究会","電子情報通信学会 シリコンアナログRF研究会","電子情報通信学会",,,"p. 6",2009,July
"Takayuki Sekiguchi,Shuhei Amakawa,Noboru Ishihara,Kazuya Masu","オンチップコプレーナ‐ストリップ差動伝送線路の最適化設計","LSIとシステムのワークショップ2009","LSIとシステムのワークショップ2009","LSIとシステムのワークショップ2009",,,"pp. 312-314",2009,May
"Takayuki Sekiguchi Kazuya Miyashita Shuhei Amakawa Noboru Ishihara Kazuya Masu,Kazuya Miyashita,Shuhei Amakawa,Noboru Ishihara,Kazuya Masu","Design of Coplanar-Strip Differential Transmission Line on Si Substrate","2009 年 電子情報通信学会総合大会","2009 年 電子情報通信学会総合大会","電子情報通信学会",,,"  C-12-26",2009,Mar.