"Shiho Hagiwara,吉川 隆英,Tomoya Yuki,Toshio Endo","3D Stacked SRAMを活用したHPC向けメモリアーキテクチャの検討","デザインガイア2022","情報処理学会研究報告","情報処理学会","Vol. 2022-SLDM-200","No. 31",,2022,Nov. "Shiho Hagiwara,Koh Yamanaga,Ryo Takahashi,Kazuya Masu,Takashi Sato","Linear Time Calculation of State-Dependent Power Distribution Network Capacitance.","International Symposium on Quality Electronic Design (ISQED)","International Symposium on Quality Electronic Design (ISQED)","International Symposium on Quality Electronic Design (ISQED)",,,"pp. 75-80",2010,Mar. "Takanori Date,Shiho Hagiwara,Kazuya Masu,Takashi Sato","超球の一部を用いた歩留り推定における不良領域の効率的探索手法","VLSI設計技術研究会,電子情報通信学会技術研究報告","VLSI設計技術研究会,電子情報通信学会技術研究報告","VLSI設計技術研究会,電子情報通信学会技術研究報告",,,"pp. 37-42",2010,Mar. "Takanori Date,Shiho Hagiwara,Kazuya Masu,Takashi Sato","Robust importance sampling for efficient SRAM yield analysis","International Symposium on Quality Electronic Design (ISQED)","International Symposium on Quality Electronic Design (ISQED)","International Symposium on Quality Electronic Design (ISQED)",,,"pp. 15-21",2010,Mar. "Takanori Date,Shiho Hagiwara,takumi uezono,Takashi Sato,Kazuya Masu","SRAM回路の構造的対称性を考慮した2段階学習型重点的サンプリング","VLSI設計技術研究会 システム設計及び一般","VLSI設計技術研究会 システム設計及び一般,信学技報","VLSI設計技術研究会 システム設計及び一般","vol. 109","no. 34","pp. 37-42",2009,May "Shiho Hagiwara,Takashi Sato,Kazuya Masu","Analytical Estimation of Path-Delay Variation for Multi-Threshold CMOS Circuits",,"IEICE Transactions on Fundamentals of Electronics","IEICE Transactions on Fundamentals of Electronics","Vol. E92-A","No. 4","pp. 1031-1038",2009,Apr. "Shiho Hagiwara,Ryo Takahashi,Koh Yamanaga,Takashi Sato,Kazuya Masu","A Study on Power-supply Capacitance Model Considering State Dependency","2009 年 電子情報通信学会総合大会","2009 年 電子情報通信学会総合大会","電子情報通信学会",,," C-12-30",2009,Mar. "Koh Yamanaga Ryo Takahashi Shiho Hagiwara Takashi Sato Kazuya Masu,Ryo Takahashi,Shiho Hagiwara,Takashi Sato,Kazuya Masu","Calculation of State-Dependent Power-Distribution-Network Capacitance Based on Table Look Up","2009 年 電子情報通信学会総合大会","2009 年 電子情報通信学会総合大会","電子情報通信学会",,," C-12-31",2009,Mar. "Takanori Date,Shiho Hagiwara,Takashi Sato,Noriaki Nakayama,Kazuya Masu","回路特性ばらつき解析に対する重点的サンプリングの適用検討","電子情報通信学会ソサイエティ大会","電子情報通信学会ソサイエティ大会",,," A-1-27","pp. 27",2008,Sept. "Tomoyuki Takahashi,Hiroyuki Ueyama,Shiho Hagiwara,Takashi Sato,Kazuya Masu","論理セル遅延の電圧・プロセスばらつき感度の検討","電子情報通信学会ソサイエティ大会","電子情報通信学会ソサイエティ大会",,," A-3-2","pp. 52",2008,Sept. "Shiho Hagiwara,Takumi Uezono,Takashi Sato,Kazuya Masu","Application of Correlation-based Regression Analysis for Improvement of Power Distribution Network",,"IEICE Transactions on Fundamentals of Electronics",,"Vol. E91-A","No. 5","pp. 951-956",2008,Apr. "Shiho Hagiwara,Takashi Sato,Kazuya Masu","Analytical Calculation of Path Delay Variation for Power-Gated Circuits","第21回 回路とシステム軽井沢ワークショップ","第21回 回路とシステム軽井沢ワークショップ",,,,"pp. 427-432",2008,Apr. "Kazuya Masu,Shiho Hagiwara,Takashi Sato","電源遮断回路におけるインバータ列遅延時間ばらつきの計算","電子情報通信学会 総合大会","電子情報通信学会 総合大会",,,,"pp. A-3-7,",2008,Mar. "Shiho Hagiwara,Takashi Sato,Kazuya Masu","パワーゲーティング技術における製造ばらつきの回路特性への影響","第131回 システムLSI設計技術研究発表会 (ICD/SIP/IE/SLDM合同研究会)",,,,,,2007,Oct. "Takashi Sato,Shiho Hagiwara,Takumi Uezono,Kazuya Masu","Weakness identification for effective repair of power distribution network","17th International workshop on power and timing modeling, optimization and simulation (PATMOS)",,,,,"pp. 222-231",2007,Sept. "Shiho Hagiwara,Takumi Uezono,Takashi Sato,Kazuya Masu","相関係数にもとづく回帰分析の電源改善への適用","第20回 回路とシステム軽井沢ワークショップ",,,,,"pp. 45-50",2007,Apr. "Shiho Hagiwara,Takumi Uezono,Takashi Sato,Kazuya Masu","Improvement of power distribution network using correlation-based regression analysis","Great Lakes Symposium on VLSI (GLSVLSI)",,,,,"pp. 513-516",2007,Mar. "Shiho Hagiwara,unknown unknown,Takashi Sato,Kazuya Masu","電源電圧降下の相関を用いる電源網の定量的評価","電子情報通信学会 総合大会",,,,"No. A-3-7",,2007,Mar. "Takashi Sato,Takumi Uezono,Shiho Hagiwara,Kenichi Okada,Shuhei Amakawa,Noriaki Nakayama,Kazuya Masu","A MOS transistor-array for accurate measurement of subthreshold leakage variation","International Symposium on Quality Electronic Design (ISQED)",,,,,"pp. 21-26",2007,Mar.