"Yusuke Iiyama,Haruhiko Kaneko","Modified Look-Ahead Bit-Flipping Decoding for QC-MDPC McEliece PKC",,"Proc. 46th Symposium on Information Theory and its Applications",,,,"pp. 135-140",2023,Nov.
"Yusuke Iiyama,Haruhiko Kaneko","Gradient Bit-Flipping Decoding for QC-MDPC McEliece PKC",,"Proc. IEEE International Conference on Consumer Electronics ? Taiwan",,,,,2023,July
"Haruhiko Kaneko","A Study on Synchronization Error Correcting Concatenated Code with Run-Length and Balance Constraints",,"Technical Report of IEICE",,,,"  IT2023-9",2023,May
"Eiki Shin,Haruhiko Kaneko","タイミング攻撃に対する耐性を有するビットフリッピング復号の検討",,"Technical Report of IEICE",,,,"  FIIS-23-574",2023,Mar.
"Eiki Shin,Haruhiko Kaneko","Error Rate Evaluation of Decoding Algorithms of QC-MDPC Code Using Weighted NUP Distribution",,"Proc. 45th Symposium on Information Theory and its Applications",,,,"pp. 529-534",2022,Nov.
"Yusuke Iiyama,Haruhiko Kaneko","A Study on Reaction-Based Attack on QC-MDPC McEliece PKC",,"Proc. 2022 IEEE Int. Conf. Consumer Electronics - Taiwan",,,,,2022,July
"Haruhiko Kaneko","Look-Ahead Bit-Flipping Decoding of MDPC Code",,"Proc. 2022 IEEE Int. Symp. Information Theory",,,,"pp. 2935-2940",2022,June
"Yusuke Iiyama,Haruhiko Kaneko","A Study on Reaction-Based Attack on QC-MDPC McEliece PKC",,"Technical Report of IEICE",,,,"  FIIS-22-555",2022,Mar.
"Kazuki Ichihara,Haruhiko Kaneko","Runlength Limited and GC-content Constraining Algorithm for Base Abstract Sequence in DNA Storage",,"Technical Report of IEICE",,,,"  FIIS-22-556",2022,Mar.
"Leo Otani,Haruhiko Kaneko","Lossy Error Correction Coding Using Systematic q-ary Polar Codes",,"Technical Report of IEICE",,,,"  FIIS-22-554",2022,Mar.
"Haruhiko Kaneko","Error Correction Coding for DNA Storage (Tutorial)",,"Proc. IEICE General Conference",,,,"  AT-1-2",2022,Mar.
"Eiki Shin,Haruhiko Kaneko","Error rate evaluation of pairwise bit-flipping decoding of QC-MDPC code",,"Proc. 44th Symposium on Information Theory and Its Applications",,,,"pp. 327-331",2021,Dec.
"Ryosuke Nakata,Haruhiko Kaneko","Synchronization and Asymmetric Error Correction for Nanopore Sequencing",,"Proc. 2021  IEEE Int. Conf. Consumer Electronics-Taiwan",,,,,2021,Sept.
"Leo Otani,Haruhiko Kaneko","Lossy Error Correction Coding for Vector-Matrix Multiplication",,"TECHNICAL REPORT OF IEICE",,,,"  DC2021-7",2021,July
"Eiki Shin,Haruhiko Kaneko","Relation between Likelihood Distribution and Computational Complexity in Soft Information Set Decoding",,"TECHNICAL REPORT OF IEICE",,,,"  FIIS-21-538",2021,June
"Ryosuke Nakata,Haruhiko Kaneko","Synchronization and Asymmetric Error Correction for Nanopore Sequencing",,"TECHNICAL REPORT OF IEICE",,,,"  FIIS-21-534",2021,Mar.
"Leo Otani,Haruhiko Kaneko","Polar Coding for Oversampling Drift Channel",,"Proc. 2020 Int. Symp. Information Theory and Its Applications",,,,"pp. 289-293",2020,Oct.
"Yuki Katsu,Haruhiko Kaneko","A Study on Error Correction Coding For Matrix Multiplications Based on Product Codes",,"TECHNICAL REPORT OF IEICE",,,,"  DC2020-16",2020,July
"Ryo Sakogawa,Haruhiko Kaneko","Symbolwise MAP Estimation for Multiple-Trace Insertion/Deletion/Substitution Channels",,"Proc. 2020 IEEE Int. Symp. Information Theory",,,,"pp. 781-785",2020,June
"Leo Otani,Haruhiko Kaneko","A Study on Polar Coding for Oversampling Drift Channel",,"TECHNICAL REPORT OF IEICE",,,,"  FIIS-20-525",2020,June
"Hikari Koremura,Haruhiko Kaneko","Insertion/Deletion/Substitution Error Correction by a Modified Successive Cancellation Decoding of Polar Code",,"IEICE Transactions on Fundamentals of Electronics,Communications and Computer Sciences",,"Vol. E103-A","No. 4","pp. 695-703",2020,Apr.
"Yuta Ishimatsu,Haruhiko Kaneko","Successive Cancellation Decoding of Polar Code for Timing-Drift Channel",,"Proc. 42nd Symp. Information Theory and its Applications",,,,"pp. 511-516",2019,Nov.
"Ryo Sakogawa,Haruhiko Kaneko","MAP Estimation Using Multiple Received Words for DNA Storage",,"Proc. 42nd Symp. Information Theory and its Applications",,,,"pp. 355-360",2019,Nov.
"Hikari Koremura,Haruhiko Kaneko","Successive Cancellation Decoding of Polar Codes for Insertion/Deletion Error Correction",,"Proc. 2019 IEEE Int. Symp. Information Theory",,,,"pp. 1357-1361",2019,July
"Yuki Katsu,Haruhiko Kaneko","A Study on Multiple-error Correction for Matrix-Product Computation Using Steiner Triple System",,"TECHNICAL REPORT OF IEICE",,,,"  DC2019-26",2019,July
"Ryo Sakogawa,Haruhiko Kaneko","Insertion/deletion error correction method using factor graph for DNA-based data storage",,"TECHNICAL REPORT OF IEICE",,,,"  FIIS-19-506",2019,June
"Len Yoshida,Haruhiko Kaneko","A Study on Redundant Computation of Matrix-Vector Product for Fault-Tolerant Neural Networks",,"Proc. 2019 IEEE Int. Symp. Consumer Electronics - Taiwan",,,,,2019,May
"Len Yoshida,Haruhiko Kaneko","A Study on Error Correction Coding for Matrix-Vector Product Based on Linear Code ant Its Application to Neural Networks",,"IEICE technical report",,,,"  FIIS-19-498",2019,Mar.
"Haruhiko Kaneko","A Study on Channels with Timing-Drift and ISI",,"Proc. 41st Symposium on Information Theory and its Applications",,,,"pp. 297-302",2018,Dec.
"Haruhiko Kaneko","Slepian-Wolf Coding with Side-Information Having Insertion/Deletion Errors",,"Proc. 2018 International Symposium on Information Theory and Its Applications",,,,"pp. 607-611",2018,Oct.
"Ryo Sakogawa,Haruhiko Kaneko","Study on inner code used for concatenated coding in timing drift ISI channel",,"TECHNICAL REPORT OF IEICE",,,,"  FIIS-18-474",2018,June
"Haruhiko Kaneko","Preliminary Experiments on Fault-Tolerance of a Small Convolutional Neural Network",,"Proc. IEEE Int. Conf. Consumer Electronics - Taiwan",,,,"pp. 99-100",2018,May
"Hikari Koremura,Haruhiko Kaneko","A study on segmented deletion error correction using polar code",,"TECHNICAL REPORT OF IEICE",,,,,2018,Mar.
"Haruhiko Kaneko","Insertion/Deletion/Substitution Error Correction Coding Using Markers",,"Proc. 2017 IEICE Society Conference",,,,,2017,Sept.
"Takeru Hirano,Haruhiko Kaneko","A study on modulation coding for channels with fragmented bit shifts",,"IEICE Technical Report",,,,"  DC2017-16",2017,July
"Haruhiko Kaneko","Timing-Drift Channel Model and Marker-Based Error Correction Coding",,"Proc. 2017 IEEE Int. Symp. Information Theory",,,,"pp. 1943-1947",2017,June
"Yusei Suzuki,Haruhiko Kaneko","Correlated Insertion/Deletion Error Correction Coding for Bit-Patterned Media",,"Proc. 2017 IEEE International Conference on Consumer Electronics - Taiwan",,,,"pp. 7-8",2017,June
"Yuki Katsu,Haruhiko Kaneko","Parallelization of Lossless Compression Algorithm Using Multiple Hash Tables",,"Proc. 39th Symp. Information Theory and its Applications",,,,"pp. 517-521",2016,Dec.
"Yuki Katsu,Haruhiko Kaneko","A Study on Encoder/Decoder Structure of Parallel Compression Algorithm for Text Data",,"IEICE technical report",,,,,2016,Oct.
"Haruhiko Kaneko,Yuki Katsu","Low-Latency Lossless Compression Using Dual-Stream Coding",,"Proc. 2016 Int. Symp. Information Theory and Its Applications",,,,"pp. 677-681",2016,Oct.
"Haruhiko Kaneko","A study on t/m-bit mis-synchronization channel model and error control coding",,"IEICE technical report",,,,,2016,Aug.
"Ryohei Goto,Kenta Kasai,Haruhiko Kaneko","Coding of insertion-deletion-substitution channels without markers",,"2016 IEEE Int. Symp. Information Theory",,,,"pp. 635-639",2016,July
"Yuki Katsu,Haruhiko Kaneko","Low-Latency Lossless Compression Codec Design for High-Throughput Data-Buses",,"Proc. 2016 IEEE Int. Conf. Consumer Electronics-Taiwan",,,,"pp. 274-275",2016,May
"Yuki Katsu,Haruhiko Kaneko","Low-Latency Lossless Compression for Data Bus Using Multiple-Type Dictionaries",,"Proc. 2016 Data Compression Conference",,,,"p. 610",2016,Mar.
"Yusei Suzuki,Haruhiko Kaneko","A Study on Channel Modeling and Detection Algorithm for Insertion/Deletion/Substitution Errors with Memory",,"Technical Report of IEICE",,,,,2016,Mar.
"Yuki Katsu,Haruhiko Kaneko","A Study on Low-latency Data Compression Using Context-Based Variable-length Coding",,"Technical Report of IEICE",,,,,2016,Mar.
"Ryohei Goto,Kenta Kasai,Haruhiko Kaneko","Coding deletion-insertion-substitution channels without markers",,"Proc. 38th Symp. Information Theory and its Applications",,,,"pp. 241-246",2015,Nov.
"Haruhiko Kaneko","Failure Recovery Cost Reduction of Disk Arrays Using Adaptive Erasure Correction Coding and Data Compression",,"Proc. 2015 IEEE Pacific Rim Int. Symp. Dependable Computing",,,,"pp. 255-263",2015,Nov.
"Yuki Katsu,Haruhiko Kaneko","Dictionary-Based Compression Using Partial-Pattern-Matching Hash Table",,"Proc. 38th Symp. Information Theory and its Applications",,,,"pp. 433-438",2015,Nov.
"Yuki Katsu,Haruhiko Kaneko","A Study on Encoder/Decoder Strcture of Dictionary-Based Compression Algorithm Using Partial-Pattern-Matching Hash-Table",,"IEICE technical report",,,,"  FIIS-15-409",2015,Oct.
"Yuta Hasegawa,Haruhiko Kaneko","Analysis of Repair Bandwidth of Disk Arrays Using Adaptive Erasure Coding and Data Compression",,"IEICE technical report",,,,"  FIIS-15-410",2015,Oct.
"Haruhiko Kaneko","Error Correction Coding for Insertion/Deletion/Substitution Channels","4th Workshop of Error Correcting Codes",,,,,,2015,Sept.
"長谷川 雄大,Haruhiko Kaneko","C-021 適応的消失訂正符号化とデータ圧縮によるディスクアレイの修復バンド幅の削減(C分野:ハードウェア・アーキテクチャ,一般論文)",,"情報科学技術フォーラム講演論文集","FIT(電子情報通信学会・情報処理学会)運営委員会","Vol. 14","No. 1","pp. 275-278",2015,Aug.
"Yuuki Katsu,Haruhiko Kaneko","A Study on Hash Table Structure for Low-Latency Dictionary-Based Compression Algorithm",,"Technical Report of IEICE",,,,"  FIIS-15-399",2015,June
"Takuzo Hirata,Haruhiko Kaneko","Construction of Fault-Tolerant Disk Arrays using Adaptive Mode Switching between Replication and Erasure Correction Coding",,"IEICE technical report",,,,"  FIIS-15-394",2015,Mar.
"Haruhiko Kaneko","Symbol-Level Synchronization Using Probability Lookup-Table for IDS Error Correction",,"Proc. 2014 Int. Symp. Information Theory and its Applications",,,,"pp. 544-548",2014,Oct.
"Kousuke Ota,Viet Ta Hong,Haruhiko Kaneko","Adaptive Erasure Correction Coding for Energy Efficient Dependable Storage Systems",,"Proc. The 1st Int. Workshop on Future Technologies for Smart Information Systems",,,,"pp. 112-118",2014,Oct.
"Tomohiko Shimamura,Haruhiko Kaneko","Insertion/Deletion/Substitution Error Correction Using Non-binary LDPC Code and Symbol Level Synchronization",,"Technical Report of IEICE",,,,"  FIIS-14-377",2014,June
"Daniel Louw,Haruhiko Kaneko","A symbol based distributed video coding system using multiple hypotheses",,"IEICE Trans. Fundamentals",,"Vol. E97-A","No. 2","pp. 632-641",2014,Feb.
"Masato Inoue,Haruhiko Kaneko","Adaptive Marker Coding for Insertion/Deletion/Substitution Error Correction",,"IEICE Trans. Fundamentals",,"Vol. E97-A","No. 2","pp. 642-651",2014,Feb.
"Haruhiko Kaneko","Periodic Pattern Coding for Last Level Cache Data Compression",,"IEICE Trans. Fundamentals",,"Vol. E96-A","No. 12","pp. 2351-2359",2013,Dec.
"Kousuke Ota,Ta Hong Viet,Haruhiko Kaneko","Adaptive Redundant Data Allocation for Systems with Probabilistically Available Storage Elements",,"Proc. 19th IEEE Pacific Rim Int. Symp. Dependable Computing",,,,,2013,Dec.
"Johanners Lou Daniel,Haruhiko Kaneko","Suppressing feedback in a distributed video coding system by employing real field codes",,"EURASIP Journal on Advances in Signal Processing",,,,"  2013:181",2013,Dec.
"Daniel Louw,Haruhiko Kaneko","Efficient Conditional Entropy Estimation for Distributed Video Coding",,"Proc. 2013 Picture Coding Symposium",,,,"pp. 61-64",2013,Dec.
"Kousuke Ota,Haruhiko Kaneko","Dependable Data Allocation for Distributed Storage with MDS Code",,"IEICE Technical Report",,,,"  DC2013-16",2013,Aug.
"Kousuke Ota,Haruhiko Kaneko","ディスクアレイにおけるディスク稼働状態に応じた動的データ符号化法の検討",,"IEICE Technical Report",,,,"  FIIS-13-355",2013,July
"Haruhiko Kaneko,Satoshi Fujii,Hiroaki Sasaki","Differential Base Pattern Coding for Cache Line Data Compression",,"Proc. Data Compression Conference 2013",,,,"p. 499",2013,Mar.
"Kousuke Ota,Satoshi Fujii,Hiroaki Sasaki,Haruhiko Kaneko","Differential Base Pattern Coding for Cache Line Data Compression",,"Proc. 35th Symp. Information Theory and its applications",,,,"pp. 514-519",2012,Dec.
"Ta Hong Viet,Kousuke Ota,Haruhiko Kaneko","Redundant Adaptive Data Allocation for Energy Efficient Dependable Disk Arrays",,"Proc. 35th Symp. Information Theory and its applications",,,,"pp. 44-49",2012,Dec.
"Masato Inoue,Haruhiko Kaneko","Selecting Method of Marker Code for Insertion/Deletion/Substitution Error Correction",,"Proc. 35th Symp. Information Theory and its applications",,,,"pp. 111-116",2012,Dec.
"Daniel J. Louw,Haruhiko Kaneko","A system combining extrapolated and interpolated side information for single view multi-hypothesis distributed video coding",,"Proc. 2012 Int. Symp. Information Theory and its applications",,,,"pp. 779-783",2012,Oct.
"Masato Inoue,Haruhiko Kaneko","Insertion/Deletion/Substitution Error Correction using Adaptive Inversion of Synchronization Marker",,"Proc. 2012 Int. Symp. Information Theory and its Applications",,,,"pp. 221-225",2012,Oct.
"Masato Inoue,Haruhiko Kaneko","Adaptive Synchronization Marker for Insertion/Deletion/Substitution Error Correction",,"Proc. 2012 IEEE Int. Symp. Information Theory",,,,"pp. 513-517",2012,July
"Masato Inoue,Haruhiko Kaneko","Insertion/Deletion/Substitution Error Correction using Adaptive Synchronization Symbol",,"IEICE Technical Report",,,,"  FIIS-12-333",2012,June
"Yusuke Fujisaka,Haruhiko Kaneko","The Simulation of Variable-Rate Transmission using Non-Binary LDPC Codes with GPGPU",,"IPSJ SIG Technical Report",,"Vol. 2012-HPC-133","No. 32","pp. 1-6",2012,Mar.
"Satoshi Fujii,Haruhiko Kaneko","Data Compression Algorithm for Cache Memory on GPGPU Device",,"IEICE Technical Report",,,,"  FIIS-12-321",2012,Mar.
"Johanners Lou Daniel,Haruhiko Kaneko","A Multi-Hypothesis Non-Binary LDPC Code based Distributed Video Coding System",,"Proc. 13th IASTED Int. Conf. on Signal and Image Processing",,,,"  074",2011,Dec.
"Masato Inoue,Haruhiko Kaneko","Adaptive Synchronization Symbol for Insertion/Deletion/Substitution Error Correction",,"Proc. 34th Symp. on Information Theory and Its Applications",,,,"pp. 98-102",2011,Nov.
"Masato Inoue,Haruhiko Kaneko","Deletion/Insertion/Reversal Error Correcting Codes for Bit-Patterned Media Recording",,"Proc. 2011 IEEE Int. Symp. Defect and Fault Tolerance in VLSI and Nanotechnology Systems",,,,"pp. 286-293",2011,Oct.
"Masato Inoue,Haruhiko Kaneko","Double Deletion/Insertion/Substitution Error Correcting Code for Bit Patterned Media Recording",,"Proc. 10th Forum on Information Technology",,,,"  RC-004",2011,Sept.
"Haruhiko Kaneko","Error Control Coding for Flash Memory",,"Flash Memories","Intech",,,,2011,Aug.
"Yuu Maeda,Haruhiko Kaneko","Study on distributed video coding using light-weight motion estimation",,"Proc. of the 73rd National Convention of IPSJ",,,,"  3T-1",2011,Mar.
"Daisuke Azuma,Haruhiko Kaneko","Data Compression Using Large Reference Area for Flash File System",,"Proc. 2011 IEICE General Conference",,,,"  A-6-8",2011,Mar.
"Masato Inoue,Haruhiko Kaneko","Double Deletion/Insertion/Reversal Error Correction Algorithm for Oversampling Serial Communication",,"Technical Report of IEICE",,,,"  FIIS-11-297",2011,Mar.
"Yuusuke Sano,Haruhiko Kaneko","Construction of Erasure Correcting Codes without Spare Disks for Distributed Storage System",,"Proc. of 2011 IEICE General Conference",,,,"  D-10-1",2011,Mar.
"Yuu Maeda,Tsukasa Saito,Haruhiko Kaneko","Study on rate estimation for distributed video coding using non-binary LDPC code",,"Proc. 33rd Symposium on Information Theory and Its Applications",,,,"pp. 220-225",2010,Nov.
"Takashi Niitsuma,Haruhiko Kaneko","Evaluation of data compression for data transfer from cache memory to main memory",,"Proc. 33rd Symposium on Information Theory and Its Applications",,,,"pp. 214-219",2010,Nov.
"Haruhiko Kaneko","Probabilistic Search of Nonbinary LDPC Codes for Distributed Video Coding",,"Proc. 2010 International Symposium on Information Theory and Its Applications",,,,"  231-236",2010,Oct.
"Yoshito Sakaguchi,Mochamad Asri,Shinya Takamaeda,Haruhiko Kaneko,Kenji Kise","誤り訂正符号を用いた計量な高速シリアル通信機構の実装と評価",,"電子情報通信学会研究報告 ＣＰＳＹ2010-19",,,,"pp. 67-72",2010,Aug.
"Naoya Takahashi,Haruhiko Kaneko","Probabilistic Search of Nonbinary LDPC Codes for Distributed Video Coding",,"Technical Report of IEICE",,,,"  FIIS-10-284",2010,June
"Yoshihiro Sawa,Haruhiko Kaneko","Construction of Error Correcting Code for High-speed Serial Communication",,"Proc. 2010 IEICE General Conference",,,,"  D-10-7",2010,Mar.
"Yoshihiro Sawa,Haruhiko Kaneko","Error Rate Evaluation of High-Speed Serial Channel and \\Construction of Error Correcting Code","機能集積情報システム研究会","Technical Report of IEICE",,,,"  FIIS-09-266",2009,Oct.
"Yuu maeda,Haruhiko Kaneko","Error Control Coding for Multilevel Cell Flash Memories Using Nonbinary Low-Density Parity-Check Codes","2009 IEEE Int. Symposium on Defect and Fault Tolerance in VLSI Systems","Proc. 2009 IEEE Int. Symposium on Defect and Fault Tolerance in VLSI Systems","IEEE",,,"pp. 367-375",2009,Oct.
"Yuu Maeda,Haruhiko Kaneko","Construction and Evaluation of Nonbinary LDPC Codes for Multilevel Cell Flash Memories","8th Forum on Information Technology","Proc. 8th Forum on Information Technology",,,,"  RC-015",2009,Sept.
"Daisuke Azuma,Haruhiko Kaneko","Data Compression for Main Memory Systems using Block Sorting","8th Forum on Information Technology","Proc. 8th Forum on Information Technology",,,,"  C-015",2009,Sept.
"Haruhiko Kaneko,Eiji Fujiwara","M-Ary Substitution/Deletion/Insertion/Adjacent-Symbol-Transposition Error Correcting Codes for Data Entry Systems",,"IEICE Trans. Fundamentals",,"Vol. E92-A","No. 7","pp. 1668-1676",2009,July
"Haruhiko Kaneko,Eiji Fujiwara","A Class of Array Codes Correcting a Cluster of Unidirectional Errors for Two-Dimensional Matrix Symbols",,"IEICE Trans. Fundamentals",,"Vol. E92-A","No. 6","pp. 1508-1519",2009,June
"Yuu Maeda,Haruhiko Kaneko","Construction of Nonbinary LDPC Codes for Multilevel Cell Flash Memories","機能集積情報システム研究会","IEICE Technical Report","IEICE Japan",,,"  FIIS-09-259",2009,June
"Daisuke Azuma,Haruhiko Kaneko","Data Compression for Main Memory Systems using Block Sorting","機能集積情報システム研究会","IEICE Technical Report","IEICE Japan",,,"  FIIS-09-258",2009,June
"Haruhiko Kaneko,Eiji Fujiwara","Joint source-cryptographic-channel coding for dependable systems",,"International Journal of Computer Applications in Technology",,"Vol. 34","No. 4","pp. 249-256",2009,
"Haruhiko Kaneko,Takuya Matsuzaka,Eiji Fujiwara","Three-Level Error Control Coding for Dependable Solid-State Drives","IEEE Pacific Rim International Symposium on Dependable Computing","Proc. IEEE Pacific Rim International Symposium on Dependable Computing",,,,"pp. 281-288",2008,Dec.
"Haruhiko Kaneko,Takuya Matsuzaka,Eiji Fujiwara","Two-Level Error Control Coding for High-Capacity SSD using Flash Memories","7th Forum on Information Technology","Proc. 7th Forum on Information Technology",,,,"  RC-012",2008,Sept.
"Haruhiko Kaneko,Eiji Fujiwara","Joint Source-Cryptographic-Channel Coding for Dependable Systems","5th Int. Symp. on Information Technology and Applications","Proc. 2008 Int. Conference on Information Technology and Applications",,,,"pp. 9-14",2008,June
"Haruhiko Kaneko,Takuya Matsuzaka,Eiji Fujiwara","Construction of Two-Level Error Control Coding for Flash Memories","機能集積情報システム研究会","IEICE Technical Report","IEICE Japan",,,"  FIIS-08-234",2008,June
"Haruhiko Kaneko,Eiji Fujiwara","Joint Coding Using Extended Huffman Code",,"Proc. 2008 IEICE General Conference",,,,"pp. D-10-10",2008,Mar.
"Haruhiko Kaneko,Eiji Fujiwara","Joint Source-Cryptographic-Channel Coding for Dependable Systems","機能集積情報システム研究会","IEICE Technical Report","電子情報通信学会",,,"  FIIS-08-227",2008,Mar.
"Haruhiko Kaneko,Eiji Fujiwara","Joint Source-Cryptographic-Channel Coding Based on Linear Block Codes",,"Proc. 17th Int. Symposium on Applied Algebra, Algebraic Algorithms, and Error Correcting Codes",,,,"pp. 158-167",2007,Dec.
"Haruhiko Kaneko,EIJI FUJIWARA","Joint Source-Cryptographic-Channel Coding Based on Linear Block Codes",,"Proc. 30th Symposium on Information Theory and Its Applications",,,,"pp. 666-671",2007,Nov.
"Haruhiko Kaneko,EIJI FUJIWARA","Joint Coding with Data Compression, Encryption, and Error Control Coding Capabilities",,"Information Technology Letters",,,,"pp. LC-013",2007,Sept.
"Haruhiko Kaneko,EIJI FUJIWARA","Reconstruction of Erasure Correcting Codes for Dependable Distributed Storage System without Spare Disks",,"Proc. 2007 IEEE Int. Symp. on Defect and Fault Tolerance in VLSI Systems",,,,"pp. 349-357",2007,Sept.
"Kazuyoshi Suzuki,Haruhiko Kaneko,Eiji Fujiwara","MacWilliams Identity for m-Spotty Weight Enumerator",,"Proc. 2007 IEEE International Symposium on Information Theory",,,,"pp. 31-35",2007,June
"Yasuhide Hyodo,Haruhiko Kaneko,EIJI FUJIWARA","Dynamic Reconstruction of Erasure Correcting Codes for Distributed Storage Systems","2007年電子情報通信学会総合大会","Proc. 2007 IEICE General Conference","IEICE Japan",,,"  D-10-7",2007,Mar.
"Satoshi Higo,Haruhiko Kaneko,Eiji Fujiwara","Construction of Error Control Codes for Semiconductor File Storage Systems","機能集積情報システム研究会","IEICE Technical Report","IEICE Japan",,,"  FIIS-07-197",2007,Mar.
"Hiroyuki Ohde,Haruhiko Kaneko,EIJI FUJIWARA","Construction of Triple-Erasure Correcting Codes for Dependable Distributed Storage Systems","機能集積情報システム研究会","IEICE Technical Report",,,,"  FIIS-06-191",2006,Oct.
"Hiroyuki Ohde,Haruhiko Kaneko,EIJI FUJIWARA","Low-Density Triple-Erasure Correcting Codes for Dependable Distributed Storage Systems","IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems","Proc. 2006 IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems","IEEE",,,"pp. 175-183",2006,Oct.
"Haruhiko Kaneko","Video Coding Based on Low-Density Parity-Check Codes and Nonbinary Sum-Product Algorithm","2006年情報科学技術フォーラム","Proc. of 2006 Forum on Information Technology",,,,"pp. J-011",2006,Sept.
"Haruhiko Kaneko","Error Control Coding and Video Compression for Spacecraft Data-Handling Systems",,"IEICE Technical Report",,,,"  SANE2006-40",2006,Apr.
"Haruhiko Kaneko","Low Encoding Complexity Video Compression Based on Low-Density Parity Check Codes",,"IEICE Trans.",,"Vol. E89-A","No. 1","pp. 340-347",2006,Jan.
"Haruhiko Kaneko","Error Control Coding for Semiconductor Memory Systems in the Space Radiation Environment","IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems","Proc. 2005 IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems",,,,"pp. 93-101",2005,Oct.
"Haruhiko Kaneko","Low-Complexity Video Encoding using LDPC Codes","2005年電子情報通信学会ソサイエティ大会","Proc. of 2005 IEICE Society Conference",,,,"pp. A-6-5",2005,Sept.
"Haruhiko Kaneko,EIJI FUJIWARA","Nonsystematic M-Ary Asymmetric Error Correcting Codes with Deletion/Insertion/Adjacent-Symbol-Transposition Error Correction Capabilities","International Symposium on Information Theory and its Applications","Proc. of 2004 International Symposium on Information Theory and its Applications",,,,"pp. 959-964",2004,Oct.
"Haruhiko Kaneko,Eiji Fujiwara","Asymmetric/Deletion/Insertion/Adjacent-Symbol-Transposition M-Ary Error Correcting Codes",,"Proc. 2004 IEICE General Conference",,,,"pp. D-10-10",2004,Mar.
"Haruhiko Kaneko","データ入力機器高信頼化のための多元誤り制御符号の研究",,,,,,,2004,Mar.
"Haruhiko Kaneko,Mariko Numakami,EIJI FUJIWARA","Nonsystematic M-Ary Asymmetric Error Correcting Codes Designed by Multilevel Coding Method","Pacific Rim International Symposium on Dependable Computing","Proc. of 2004 Pacific Rim International Symposium on Dependable Computing","IEEE",,,"pp. 219-226",2004,Mar.
"Haruhiko Kaneko,Eiji Fujiwara","A Class of M-Ary Asymmetric Symbol Error Correcting Codes for Data Entry Devices",,"IEEE Trans. Computers",,"Vol. 53","No. 2","pp. 159-167",2004,Feb.
"Haruhiko Kaneko,EIJI FUJIWARA","Array Codes Correcting a Cluster of Unidirectional Errors for Two-Dimensional Matrix Symbols",,"Proc. 2003 IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems",,,,"pp. 242-249",2003,Nov.
"Haruhiko Kaneko,EIJI FUJIWARA","Optimal Two-Level q-Ary Unequal Error Control Codes","IEEE International Symposium on Information Theory","Proc. 2003 IEEE International Symposium on Information Theory","IEEE",,,"pp. 215",2003,June
"Haruhiko Kaneko,Mariko Numakami,Eiji Fujiwara","Nonsystematic M-Ary Asymmetric Error Correcting Codes Designed by Multilevel Codes",,"IEICE Technical Report",,,,"  FIIS-03-118",2003,June
"Toshiaki Ishikawa,Haruhiko Kaneko,EIJI FUJIWARA","q-Ary Unequal Error Control Codes with Burst Error Correcting Capabilities",,"Proc. 2003 IEICE General Conference",,,,"pp. D-10-8",2003,Mar.
"Haruhiko Kaneko,沼上真理子,EIJI FUJIWARA","Non-Systematic M-Ary Asymmetric Symbol Error Correcting Codes for Data Entry Devices",,"Proc. 2003 IEICE General Conference",,,,"pp. D-10-9",2003,Mar.
"Haruhiko Kaneko,EIJI FUJIWARA","Optimal q-Ary Unequal Error Control Codes","2002 Forum on Information Technology","Proc. 2002 Forum on Information Technology",,,,"  C-19",2002,Sept.
"Haruhiko Kaneko,Eiji Fujiwara","Generalized Expression of M-Ary Asymmetric Symbol Error Control Codes",,"Proc. of 2002 IEICE General Conference",,,,"pp. D-10-2",2002,Mar.
"Haruhiko Kaneko,EIJI FUJIWARA","m-Ary Adjacent Double Asymmetric Symbol Error Correcting Codes","2001 IEICE Society Conference","Proc. 2001 IEICE Society Conference","IEICE Japan",,,"  D-10-1",2001,Sept.
"Haruhiko Kaneko,EIJI FUJIWARA","A Class of m-Ary Asymmetric Symbol Error Correcting Codes Constructed by Graph Coloring","IEEE International Symposium on Information Theory","Proc. 2001 IEEE International Symposium on Information Theory",,,,"pp. 225",2001,June
"Haruhiko Kaneko,EIJI FUJIWARA","A Class of m-Ary Asymmetric Symbol Error Correcting Codes Designed by Graph Coloring",,"IEICE Technical Report",,,,"  FIIS-00-85",2001,Mar.
"Haruhiko Kaneko,EIJI FUJIWARA","A Class of m-Ary Asymmetric Symbol Error Correcting Codes Designed by Graph Coloring","2001 IEICE General Conference","Proc. 2001 IEICE General Conference","IEICE Japan",,,"  D-10-13",2001,Mar.
"Saowapa KIATTICHAI,Haruhiko Kaneko,EIJI FUJIWARA","q-Ary Asymmetric Error Locating Codes under Directional Error Model",,"Trans. IEICE Fundamentals",,"Vol. J84-A","No. 1","pp. 73-83",2001,Jan.
"Kiattichai SAOWAPA,Haruhiko Kaneko,Eiji FUJIWARA","Systematic Binary Deletion/Insertion Error Correcting Codes Capable of Correcting Random Bit Errors",,"IEICE Trans. Fundamentals",,"Vol. E83-A","No. 12","pp. 2699-2705",2000,Dec.
"Haruhiko Kaneko,EIJI FUJIWARA","A Class of m-Ary Asymmetric Symbol Error Correcting Code Constructed by Graph Coloring",,"Proc. 2000 IEICE Society Conference",,,,"  D-10-2",2000,Sept.
"Kiattichai SAOWAPA,Haruhiko Kaneko,Eiji FUJIWARA","Unidirectional Byte Error Correcting Codes for q-Ary Data","IEEE Int. Symposium Information Theory","Proc. 2000 IEEE Int. Symposium Information Theory",,,,"pp. 8",2000,June
"Kiattichai Saowapa,Haruhiko Kaneko,EIJI FUJIWARA","Systematic Deletion/Insertion Error Correcting Codes with Random Error Correction Capability","IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems","Proc. 1999 IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems",,,,"pp. 284-292",1999,Nov.
"Kiattichai SAOWAPA,Haruhiko Kaneko,EIJI FUJIWARA","Systematic Deletion/Insertion Error Correcting Codes with Random 1 Bit Error Correction Capabilities","1999 IEICE General Conference","Proc. 1999 IEICE General Conference",,,,"  D-10-10",1999,Mar.