"Bangan Liu,Huy Cu Ngo,Kengo Nakata,Wei Deng,Yuncheng Zhang,Junjun Qiu,Toru Yoshioka,Jun Emmei,Jian Pang,Tn Aravind,Haosheng Zhang,Dongsheng Yang,Hanli Liu,Teruki Someya,Atsushi Shirane,Kenichi Okada","A 0.4ps-Jitter -52dBc-Spur Synthesizable Injection-locked PLL with Self-clocked Non-overlap Update and Slope-balanced Sub-sampling BBPD",,"IEEE Solid-State Circuits Letters (SSC-L)",,"Vol. 2","No. 1","pp. 5-8",2019,Jan.
"Hanli Liu,Dexian Tang,Zheng Sun,Wei Deng,Huy Cu Ngo,Kenichi Okada","A Sub-mW Fractional-N ADPLL with FOM of -246dB for IoT Applications",,"IEEE Journal of Solid-State Circuits (JSSC)",,"Vol. 53","No. 12","pp. 3540-3552",2018,Dec.
"Bangan Liu,Huy Cu Ngo,Wei Deng,Yuncheng Zhang,Junjun Qiu,Kengo Nakata,Teruki Someya,Atsushi Shirane,Kenichi Okada","A 1.2 ps-Jitter Fully-Synthesizable DTC-based Fractional-N Injection-Locked PLL using True Arbitrary Nonlinearity Calibration","電子情報通信学会 ソサイエティ大会",,,,,,2018,Sept.
"Bangan Liu,Huy Cu Ngo,Yuncheng Zhang,Junjun Qiu,中田 憲吾,白根 篤史,岡田 健一","A Fully-Synthesizable Fractional-N Injection-Locked PLL Using True Arbitrary Nonlinearity Calibration Technique","電子情報通信学会 LSIとシステムのワークショップ",,,,,,2018,May
"Hongye Huang,Hanli Liu,Dexian Tang,Zheng Sun,Wei Deng,Huy Cu Ngo,白根 篤史,岡田 健一","An Ultra-Low-Power Fractional-N All-Digital PLL Using 10-bit Isolated Constant-Slope Digital-to-Time Converter","電子情報通信学会 LSIとシステムのワークショップ",,,,,,2018,May
"Bangan Liu,Huy Cu Ngo,Kengo Nakata,Wei Deng,Yuncheng Zhang,Junjun Qiu,Toru Yoshioka,Jun Emmei,Haosheng Zhang,Jian Pang,Tn Aravind,Dongsheng Yang,Hanli Liu,Kenichi Okada,Akira Matsuzawa","A 1.2 ps-Jitter Fully-Synthesizable Fully-Calibrated Fractional-N Injection-Locked PLL Using True Arbitrary Nonlinearity Calibration Technique","IEEE Custom Integrated Circuits Conference (CICC)",,,,,,2018,Apr.
"Bangan Liu,Huy Cu Ngo,Kenichi Okada,Akira Matsuzawa","A 1.2ps-Jitter Fully-Synthesizable Fully-Calibrated Fractional-N Injection-Locked PLL Using True Arbitrary Nonlinearity Calibration Technique","IEEE International Solid-State Circuits Conference",,,,,,2018,Feb.
"Hanli Liu,Dexian Tang,Zheng Sun,Wei Deng,Huy Cu Ngo,Kenichi Okada,Akira Matsuzawa","A 0.98mW Fractional-N ADPLL Using 10b Isolated Constant-Slope DTC with FoM of -246dB for IoT Applications in 65nm CMOS","IEEE International Solid-State Circuits Conference",,,,,,2018,Feb.
"Ngo Huy Cu,中田 憲吾,吉岡 透,Yuki Terashima,岡田 健一,松澤 昭","A 0.42ps-Jitter -241.7dB-FOM Synthesizable Injection-Locked PLL with Noise-Isolation LDO","電子情報通信学会 アナログRF研究会",,,"Vol. RF2017-3",,,2017,Mar.
"Yuncheng Zhang,Ngo Huy Cu,中田 憲吾,吉岡 透,Yuki Terashima,Bangan Liu,岡田 健一,松澤 昭","An Ultra-Low-Power Synthesizable Digitally Controlled Oscillator","電子情報通信学会 総合大会",,,"  C-12",,,2017,Mar.
"Bangan Liu,Ngo Huy Cu,中田 憲吾,吉岡 透,Yuki Terashima,岡田 健一,松澤 昭","A Study of Injection-locking PLL Phase Calibration with Symmetrical Phase Detector and Multiplexer","電子情報通信学会 総合大会",,,"  C-12",,,2017,Mar.
"Ngo Huy Cu,中田 憲吾,吉岡 透,寺嶋友樹,岡田 健一,松澤 昭","周波数逓倍器による注入同期PLL の雑音抑制手法","電子情報通信学会 総合大会",,,"  C-12",,,2017,Mar.
"Ngo Huy Cu,中田 憲吾,吉岡 透,Yuki Terashima,岡田 健一,松澤 昭","A 0.42ps-Jitter -241.7dB-FOM Synthesizable Injection-Locked PLL with Noise-Isolation LDO","IEEE SSCS Japan Chapter ISSCC報告会",,,,,,2017,Feb.
"Huy Cu Ngo,Kengo Nakata,Toru Yoshioka,Yuki Terashima,Kenichi Okada,Akira Matsuzawa","A 0.42ps-Jitter -241.7dB-FOM Synthesizable Injection-Locked PLL with Noise-Isolation LDO","EEE International Solid-State Circuits Conference (ISSCC),",,,,,,2017,Feb.
"Ngo Huy Cu,寺嶋友樹,吉岡 透,岡田 健一,松澤 昭","自動配置配線可能なLC型DCOの解析","電子情報通信学会 ソサイエティ大会",,,,,"  C-12-7",2016,Sept.
"吉岡 透,中田 憲吾,Ngo Huy Cu,岡田 健一,松澤 昭","Noise contributionを考慮したリング型発振器の性能改善手法","電子情報通信学会 ソサイエティ大会",,,,,"  C-12-25",2016,Sept.
"Ngo Huy Cu,中田 憲吾,岡田 健一,松澤 昭","DSMを用いた自動配置配線可能なDCOによるIL-PLLのReference Spur低減手法","電子情報通信学会 総合大会",,,,,"  C-12-8",2016,Mar.
"ゴーフィ クー,中田 憲吾,岡田 健一,松澤 昭","マルチプレクサを用いた自動配置配線可能なDCOの最適設計手法","電子情報通信学会 ソサイエティ大会",,,"  C-12-19",,,2014,Sept.