"Satoru Jimbo,Daiki Okonogi,Kota Ando,Thiem Van Chu,Jaehoon Yu,Masato Motomura,Kazushi Kawamura","A Hybrid Integer Encoding Method for Obtaining High-quality Solutions of Quadratic Knapsack Problems on Solid-state Annealers",,"IEICE Transactions on Information and Systems",,"Vol. E105-D","No. 12",,2022,Dec.
"Masafumi Tanaka,Jaehoon Yu,Masaki Nakagawa,Naoya Tate,Masanori Hashimoto","Investigating Small Device Implementation of FRET-based Optical Reservoir Computing","MWSCAS",,,,,,2022,Aug.
"Yasuyuki Okoshi,Angel Lopez Garcia-Arias,Kazutoshi Hirose,Kota Ando,Kazushi Kawamura,Thiem Van Chu,Masato Motomura,Jaehoon Yu","Multicoated Supermasks Enhance Hidden Networks","International Conference on Machine Learning",,,,,,2022,July
"Satida Sookpong,Satida Sookpong,Teerasit Kasetkasem,Teera Phatrapornnant,Jaehoon Yu","A Unhealthy Plant Identification System Using a Generative Adversarial Network","ECTI-CON",,,,,,2022,May
"劉 載勲","データ再利用性を考慮した高効率CNN推論アーキテクチャ","情報処理学会第84回全国大会",,,,,,2022,Apr.
"Masanori Hashimoto,X Bai,Naoki Banno,Munehiro Tada,Toshitsugu Sakamoto,Jaehoon Yu,Ryutaro Doi,Hidetoshi Onodera,Takashi Imagawa,Hiroyuki Ochi","Via-switch FPGA with transistor-free programmability enabling energy-efficient near-memory parallel computation",,"Japanese Journal of Applied Physics",,,,,2022,Apr.
"劉 載勲","ランダム・スパース・ストカスティック-新しい計算の形を目指して-",,"情報処理",,"Vol. 63","No. 3","pp. e31-e37",2022,Mar.
"Kazutoshi Hirose,Jaehoon Yu,Kota Ando,Yasuyuki Okoshi,Angel Lopez Garcia-Arias,Junnosuke Suzuki,Thiem Van Chu,Kazushi Kawamura,Masato Motomura","Hiddenite: 4K-PE Hidden Network Inference 4D-Tensor Engine Exploiting On-Chip Model Construction Achieving 34.8-to-16.0TOPS/W for CIFAR-100 and ImageNet",,"International Solid-State Circuits Conference",,,,,2022,Feb.
"Thiem Van Chu,Ryuichi Kitajima,Kazushi Kawamura,Jaehoon Yu,Masato Motomura","A High-Performance and Flexible FPGA Inference Accelerator for Decision Forests Based on Prior Feature Space Partitioning","International Conference on Field-Programmable Technology",,,,,,2021,Dec.
"Angel Lopez Garcia-Arias,Masanori Hashimoto,Masato Motomura,Jaehoon Yu","Hidden-Fold Networks: Random Recurrent Residuals Using Sparse Supermasks","The British Machine Vision Conference",,,,,,2021,Nov.
"Kota Ando,Jaehoon Yu,Kazutoshi Hirose,Hiroki Nakahara,Kazushi Kawamura,Thiem Van Chu,Masato Motomura","Edge Inference Engine for Deep & Random Sparse Neural Networks with 4-bit Cartesian-Product MAC Array and Pipelined Activation Aligner","Hot Chips",,,,,,2021,Aug.
"Junnosuke Suzuki,Tomohiro Kaneko,Kota Ando,Kazutoshi Hirose,Kazushi Kawamura,Thiem Van Chu,Masato Motomura,Jaehoon Yu","ProgressiveNN: Achieving Computational Scalability with Dynamic Bit-Precision Adjustment by MSB-first Accumulative Computation",,"International Journal of Networking and Computing",,,,,2021,July
"Shungo Kumazawa,Kazushi Kawamura,Thiem Van Chu,Masato Motomura,Jaehoon Yu","ExtraFerns: Fully Parallel Ensemble Learning Technique with Random Projection and Non-Greedy yet Minimal Memory Access Training",,"International Journal of Networking and Computing",,,,,2021,July
"Takashi Imagawa,Jaehoon Yu,Masanori Hashimoto,Hiroyuki Ochi","MUX Granularity Oriented Iterative Technology Mapping for Implementing Compute-Intensive Applications on Via-Switch FPGA","Design, Automation and Test in Europe Conference (DATE)",,,,,,2021,Feb.
"Kazutoshi Hirose,Shinya Takamaeda-Yamazaki,Jaehoon Yu,Masato Motomura","Selective Fine-Tuning on a Classifier Ensemble: Realizing Adaptive Neural Networks With a Diversified Multi-Exit Architecture",,"IEEE Access",,"Vol. 9",,"pp. 6179-6187",2021,Jan.
"Shungo Kumazawa,Kazushi Kawamura,Thiem Van Chu,Masato Motomura,Jaehoon Yu","ExtraFerns: Fully Parallel Ensemble Learning Technique with Non-Greedy yet Minimal Memory Access Training","International Symposium on Computing and Networking (CANDAR)",,,,,,2020,Nov.
"Junnosuke Suzuki,Kota Ando,Kazutoshi Hirose,Kazushi Kawamura,Thiem Van Chu,Masato Motomura,Jaehoon Yu","ProgressiveNN: Achieving Computational Scalability without Network Alteration by MSB-first Accumulative Computation","International Symposium on Computing and Networking (CANDAR)",,,,,,2020,Nov.
"?ngel L?pez Garc?a-Arias,Jaehoon Yu,Masanori Hashimoto","Low-Cost Reservoir Computing using Cellular Automata and Random Forests","2020 IEEE International Symposium on Circuits and Systems (ISCAS)",,,,,"pp. 1-5",2020,Oct.
"Ryutaro Doi,Jaehoon Yu,Masanori Hashimoto","Sneak Path Free Reconfiguration with Minimized Programming Steps for Via-switch Crossbar Based FPGA",,"IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems",,"vol. 39","no. 10","pp. 2572-2587",2020,Oct.
"Kazuki Onishi,Jaehoon Yu,Masanori Hashimoto","Memory Efficient Training using Lookup-Table-based Quantization for Neural Network","IEEE International Conference on Artificial Intelligence Circuits and Systems",,,,,,2020,Sept.
"TaiYu Cheng,Yukata Masuda,Jun Chen,Jaehoon Yu,Masanori Hashimoto","Logarithm-approximate floating-point multiplier is applicable to power-efficient neural network training",,,,"Vol. 74",,"pp. 19-31",2020,May
"M Hashimoto,X Bai,N Banno,M Tada,T Sakamoto,J Yu,R Doi,Y Araki,H Onodera,T Imagawa,H Ochi,K Wakabayashi,Y Mitsuyama,T Sugibayashi","Via-Switch FPGA: 65nm CMOS Implementation and Architecture Extension for AI Applications","International Solid-State Circuits Conference",,,,,"pp. 502-503",2020,Feb.
"Shota Fukui,Jaehoon Yu,Masanori Hashimoto","Distilling Knowledge for Non-Neural Networks","Asia-Pacific Signal and Information Processing Association",,,,,"pp. 1411-1416",2019,Nov.
"Toranosuke Tanio,Kouya Takeda,Jaehoon Yu,Masanori Hashimoto","Training Data Reduction using Support Vectors for Neural Networks","Asia-Pacific Signal and Information Processing Association, APSIPA",,,,,"pp. 1405-1410",2019,Nov.
"Cheng TaiYu,Jaehoon Yu,Masanori Hashimoto","Minimizing Power for Neural Network Training with Logarithm-Approximate Floating-Point Multiplier","International Symposium on Power and Timing Modeling, Optimization and Simulation",,,,,"pp. 91-96",2019,July
"Salita Sombatsiri,Seiya Shibata,Yuki Kobayashi,Hiroaki Inoue,Takashi Takenaka,Takeo Hosomi,Jaehoon Yu,Yoshinori Takeuchi","Parallelism-flexible Convolution Core for Sparse Convolutional Neural Networks on FPGA",,"IPSJ Transactions on System LSI Design Methodology",,,,,2019,Feb.
"Jaehoon Yu","Interconnect Delay Analysis for RRAM Crossbar Based FPGA","2018 IEEE Computer Society Annual Symposium on VLSI (ISVLSI)",,,,,"pp. 522-527",2018,July