"Masato Inagi,Yasuhiro Takashima,Yuichi Nakamura,Atsushi Takahashi","Optimal Time-Multiplexing in Inter-FPGA Connections for Accelerating Multi-FPGA Prototyping Systems",,"IEICE Trans. Fundamentals",,"Vol. E91-A","No. 12","pp. 3539-3547",2008,Dec. "Masato Inagi,Yasuhiro Takashima,Yuichi Nakamura,Atsushi Takahashi","ILP-Based Optimization of Time-Multiplexed I/O Assignment for Multi-FPGA Systems",,"Proc. the 2008 IEEE International Symposium on Circuits and Systems (ISCAS 2008)",,,,"pp. 1800-1803",2008,May "Masato Inagi,Atsushi Takahashi","Network-Flow Based Delay-Aware Partitioning Algorithm",,"Proc. the 13th Workshop on Synthesis And System Integration of Mixed Information technologies (SASIMI 2006)",,,,"pp. 417-422",2006,Apr. "Masato Inagi,Atsushi Takahashi","Network-Flow Based Delay-Aware Circuit Partitioning Algorithm",,"Proc. the 16th Workshop on Circuits and Systems in Karuizawa",,,,"pp. 201-206",2003,Apr. "稲木雅人,高橋篤司,畔上謙吾","回路遅延を考慮した最小カット法に基づく回路分割アルゴリズム","VLSI設計技術研究会","電子情報通信学会技術研究報告 (VLD2002-7)",,"Vol. 102","No. 72","pp. 37-42",2002,May "Kengo R. Azegami,Masato Inagi,Atsushi Takahashi,Yoji Kajitani","An Improvement of Network-Flow Based Multi-Way Circuit Partitioning Algorithm",,"IEICE Trans. Fundamentals",,"Vol. E85-A","No. 3","pp. 655-663",2002,Mar. "Masato INAGI","最小カット法に基づく回路遅延を考慮した回路分割アルゴリズムに関する研究",,,,,,,2002, "稲木雅人,梶谷洋司,高橋篤司","近接度に着目した入出力ピン配置アルゴリズム",,"電子情報通信学会 基礎・境界ソサイエティ大会 講演論文集 (A-3-1)",,"Vol. A",,"p. 68",2000,Sept.