"YASUYUKI MIYAMOTO,Toru Kanazawa","MOSFET低電圧化の為のInGaAs チャネル","応用物理学会北陸・信越支部学術講演会",,,,,,2012,Nov.
"Y. Yamaguchi,K. Hayashi,T. Oishi,H. Otsuka,T. Nanjo,K. Yamanaka,M. Nakayama,Y. Miyamoto","Simulation study and reduction of reverse gate leakage current for GaN HEMTs",,,,,,,2012,Oct.
"Tomohiro Amemiya,Toru Kanazawa,Atsushi Ishikawa,Seiji Miyouga,Eijun Murai,Takahiko Shindou,JoonHyun Kang,Nobuhiko Nishiyama,YASUYUKI MIYAMOTO,Takuo Tanaka,SHIGEHISA ARAI","---",,"第73回秋季応用物理学会学術講演会",,"Vol. 愛媛","No. 13p-C5-3",,2012,Sept.
"atsushi kato,Yosiharu Yonai,Toru Kanazawa,YASUYUKI MIYAMOTO","Si 基板上 InGaAs-MOSFET の微細化に関する研究","第73 回応用物理学会学術講演会",,,,,,2012,Sept.
"Masashi Kashiwano,Jun Hirai,Shunsuke Ikeda,Motohiko Fujimatsu,YASUYUKI MIYAMOTO","半導体ト?レイン層及ひ?狭チャネルメサ幅による縦型 InGaAs チャネル MISFET の高電圧利得化","第 73 回応用物理学会学術講演会",,,,,,2012,Sept.
"Takeru Sagai,Yosiharu Yonai,YASUYUKI MIYAMOTO","InGaAs チャネル MOSFET の EOT 削減による 伝達コンタ?クタンス向上","第 73 回応用物理学会学術講演会",,,,,,2012,Sept.
"Keishi Tanaka,YASUYUKI MIYAMOTO","55 nm 幅エミッタInP HBT およひ?電流密度とエミッタ幅の関係","第 73 回応用物理学会学術講演会",,,,,,2012,Sept.
"大石敏之,林一夫,佐々木肇,Yuutarou Yamaguchi,大塚浩志,山中宏治,中山正敏,YASUYUKI MIYAMOTO","トランシ?スタ動作時における GaN HEMT ケ?ートリークのテ?ハ?イスシミュレーションによる解析","電子情報通信学会2012年ソサエティ大会",,,,,,2012,Sept.
"M. Kashiwano,J. Hirai,S. Ikeda,M. Fujimatsu,Y. Miyamoto","High Open Circuit Voltage Gain in Vertical InGaAs Channel Metal-Insulator-Semiconductor Field-Effect Transistor using Heavily Doped Drain Region and Narrow Channel Mesa","2012 International Conference on. Solid State Devices and Materials (SSDM 2012)",,,,,,2012,Sept.
"T. Oishi,K. Hayashi,Y. Yamaguchi,H. Otsuka,K.  Yamanaka,M. Nakayama,Y. Miyamoto","Mechanism study of gate leakage current for AlGaN/GaN HEMT structure under high reverse bias by TSB model and TCAD simulation","2012 International Conference on. Solid State Devices and Materials (SSDM 2012)",,,,,,2012,Sept.
"Y. Yamaguchi,K. Hayashi,T. Oishi,H. Otsuka,K. Yamanaka,M. Nakayama,Y. Miyamoto","Analysis on trade-off between electric field and gate-drain capacitance for GaN HEMT by T-CAD simulation","2012 International Conference on. Solid State Devices and Materials (SSDM 2012)",,,,,,2012,Sept.
"Motohiko Fujimatsu,YASUYUKI MIYAMOTO","GaAsSb/InGaAs ヘテロ接合を用いた縦型トンネル FET における サフ?スレッショルト?スローフ?の改善","第 73 回応用物理学会学術講演会",,,,,,2012,Sept.
"山口 裕太郎,林 一夫,大石 敏之,大塚 浩志,小山 英寿,加茂 宣卓,山中 宏治,中山 正敏,YASUYUKI MIYAMOTO","C-10-5 GaN HEMTの電界とゲートドレイン間容量のトレードオフとPAEへの影響についてのシミュレーション解析(C-10. 電子デバイス,一般セッション)",,"電子情報通信学会ソサイエティ大会講演論文集","一般社団法人電子情報通信学会","Vol. 2012","No. 2","pp. 62",2012,Aug.
"K. Tanaka,Y. Miyamoto","InP HBT with 55-nm-wide Emitter and Relationship between Emitter Width and Current Density","24th Int. Conf. Indium Phosphide and Related Materials (IPRM2012)",,,,,,2012,Aug.
"M. Fujimatsu,H. Saito,Y. Miyamoto","71 mV/dec of Sub-Threshold Slope in Vertical Tunnel Field-Effect Transistors with GaAsSb/InGaAs Heterostructure","24th Int. Conf. Indium Phosphide and Related Materials (IPRM2012)",,,,,,2012,Aug.
"Masashi Kashiwano,Jun Hirai,Shunsuke Ikeda,Motohiko Fujimatsu,YASUYUKI MIYAMOTO","半導体ドレイン層及び狭チャネルメサ幅による縦型InGaAsチャネルMISFETの高電圧利得化","電子情報通信学会技術研究報告",,,,,,2012,May
"Atsushi Kato,Toru Kanazawa,Shunsuke Ikeda,Yosiharu Yonai,Yasuyuki Miyamoto","Reduction of access resistance of InP/InGaAs composite-channel MOSFET with back source electrode",,"IEICE Trans. Electron.",,"vol. E95-C","no. 5","pp. 904-919",2012,May
"Naoaki Takebe,Y. Miyamoto","Reduction of base-collector capacitance in InP/InGaAs DHBT with buried SiO2 wires",,"IEICE Trans. Electron.",,"vol. E95-C","no. 5","pp. 917-920",2012,May
"YASUYUKI MIYAMOTO,Yosiharu Yonai,Toru Kanazawa","エヒ?タキシャル成長ソースによる InGaAs MOSFET の高電流密度化","電気学会電子デバイス研究会",,,,,,2012,Mar.
"Masashi Kashiwano,Jun Hirai,Shunsuke Ikeda,Motohiko Fujimatsu,YASUYUKI MIYAMOTO","GaN HEMT のソース・ドレイン間容量のデバイスシミュレーションによる解析","電子情報通信学会2011年総合大会",,,,,,2012,Mar.
"YASUYUKI MIYAMOTO,Yosiharu Yonai,Toru Kanazawa","エピタキシャル成長ソースによるInGaAsMOSFETの高電流密度化","電気学会電子デバイス研究会",,,,,,2012,Mar.
"Hisashi Saito,Y. Miyamoto","Reduction of Output Conductance in Vertical InGaAs Channel Metal?Insulator?Semiconductor Field-Effect Transistor Using Heavily Doped Drain Region",,"Applied Phys. Exp.",,"vol. 5","no. 2","pp. 24101",2012,Mar.
"Yuutarou Yamaguchi,大石敏之,大塚浩志,山中宏治,南條拓真,中山正敏,平野嘉仁,YASUYUKI MIYAMOTO","デバイスシミュレーションによるGaN HEMTのゲートリークの解析","電子情報通信学会2011年総合大会",,,,,,2012,Mar.
"Yosiharu Yonai,Toru Kanazawa,Shunsuke Ikeda,YASUYUKI MIYAMOTO","InPエッチング異方性による微細InGaAsチャネルMOSFET","応用物理学会 2012年度春季大会",,,,,,2012,Mar.
"YASUYUKI MIYAMOTO,Yosiharu Yonai,Toru Kanazawa","InGaAs MOSFETの高電流密度化","電子情報通信学会技術研究報告",,,,,,2012,Jan.
"YASUYUKI MIYAMOTO,Masayuki Yamada,Ken Uchida","InGaAs MOSFETにおけるソース充電時間の検討","電子情報通信学会技術研究報告",,,,,,2012,Jan.
"Jun Hirai,Tomoki Kususaki,Shunsuke Ikeda,YASUYUKI MIYAMOTO","Vertical InGaAs MOSFET with HfO2 gate","2012 Asia-Pacific Workshop on Fundamentals and Applications of Advanced Semiconductor Devices(AWAD 2012)",,,,,,2012,
"F. Fatah,C.-I Kuo,H.-T. Hsu,C.-Y. Chiang,C.-Y. Hsu,Y. Miyamoto,E. Y. Chang","Bias-Dependent Radio Frequency Performance for 40 nm InAs High-Electron-Mobility Transistor with a Cutoff Frequency Higher than 600 GHz",,"JPN. J. APPL. PHYS.",,"vol. 51","no. 11",,2012,