"Junnosuke Suzuki,Kota Ando,Kazutoshi Hirose,Kazushi Kawamura,Thiem Van Chu,Masato Motomura,Jaehoon Yu","ProgressiveNN: Achieving Computational Scalability without Network Alteration by MSB-first Accumulative Computation","International Symposium on Computing and Networking (CANDAR)",,,,,,2020,Nov.
"Shungo Kumazawa,Kazushi Kawamura,Thiem Van Chu,Masato Motomura,Jaehoon Yu","ExtraFerns: Fully Parallel Ensemble Learning Technique with Non-Greedy yet Minimal Memory Access Training","International Symposium on Computing and Networking (CANDAR)",,,,,,2020,Nov.
"Ryutaro Doi,Jaehoon Yu,Masanori Hashimoto","Sneak Path Free Reconfiguration with Minimized Programming Steps for Via-switch Crossbar Based FPGA",,"IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems",,"vol. 39","no. 10","pp. 2572-2587",2020,Oct.
"?ngel L?pez Garc?a-Arias,Jaehoon Yu,Masanori Hashimoto","Low-Cost Reservoir Computing using Cellular Automata and Random Forests","2020 IEEE International Symposium on Circuits and Systems (ISCAS)",,,,,"pp. 1-5",2020,Oct.
"Kazuki Onishi,Jaehoon Yu,Masanori Hashimoto","Memory Efficient Training using Lookup-Table-based Quantization for Neural Network","IEEE International Conference on Artificial Intelligence Circuits and Systems",,,,,,2020,Sept.
"TaiYu Cheng,Yukata Masuda,Jun Chen,Jaehoon Yu,Masanori Hashimoto","Logarithm-approximate floating-point multiplier is applicable to power-efficient neural network training",,,,"Vol. 74",,"pp. 19-31",2020,May
"M Hashimoto,X Bai,N Banno,M Tada,T Sakamoto,J Yu,R Doi,Y Araki,H Onodera,T Imagawa,H Ochi,K Wakabayashi,Y Mitsuyama,T Sugibayashi","Via-Switch FPGA: 65nm CMOS Implementation and Architecture Extension for AI Applications","International Solid-State Circuits Conference",,,,,"pp. 502-503",2020,Feb.