"Shanlin Xiao,Tsuyoshi Isshiki,Dongju Li,Hiroaki Kunieda","HOG-Based Object Detection Processor Design Using ASIP Methodology",,"IEICE Trans. on Fundamentals",,"Vol. E100-A","No. 12","pp. 2972-2984",2017,Dec.
"一色剛","C2RTLフレームワークによるRISC-VベースSoCモデルの論理合成とシステム検証","Design Solution Forum","Design Solution Forum",,,,,2017,Oct.
"Tsuyoshi Isshiki","C++ Object-Oriented RTL Modeling for System-Level Synthesis/Verification on the C2RTL Framework","International Forum on MPSoC for Software-defined Hardware",,,,,,2017,July
"Shanlin Xiao,Tsuyoshi Isshiki,Dongju Li,Hiroaki Kunieda","Design of an Application Specific Instruction Set Processor for Real-Time Object Detection Using AdaBoost Algorithm",,"IEICE Trans. Fundamentals",,"Vol. E100-A","No. 7","pp. 1384-1395",2017,July
"Manatsawee Sanpayao,Teerasit Kasetkasem,Tsuyoshi Isshiki,Preesan Rakwatin,Thitiporn Chanwimaluang","A super-resolution land cover mapping based on a random forest and Markov random field model","Electrical Engineering/Electronics, Computer, Telecommunications and Information Technology (ECTI-CON)",,,,,,2017,June
"Zhiqiang Hu,Dongju Li,Tsuyoshi Isshiki,Hiroaki Kunieda","Narrow Fingerprint Template Synthesis by Clustering Minutiae Descriptors",,"IEICE Trans. Information and Systems",,"Vol. E100-D","No. 6","pp. 1290-1302",2017,June
"Waranrach Viriyavit,Virach Sornlertlamvanich,Waree Kongprawechnon,Panita Pongpaibool,Tsuyoshi Isshiki","Neural network based bed posture classification enhanced by Bayesian approach","Information and Communication Technology for Embedded Systems",,,,,,2017,May
"Manatsawee Sanpayao,Teerasit Kasetkasem,Preesan Rakwatin,Tsuyoshi Isshiki,Thitiporn Chanwimaluang","A Subpixel Classification Algorithm Based on a Random Forest Approach","Information and Communication Technology for Embedded Systems",,,,,,2017,May
"Zhiqiang Hu,Dongju Li,Tsuyoshi Isshiki,Hiroaki Kunieda","Hybrid Minutiae Descriptor for Narrow Fingerprint Verification",,"IEICE Trans. Information and Systems",,"Vol. E100-D","No. 3","pp. 546-555",2017,Mar.
"Farhan Shafiq,Tsuyoshi Isshiki,Dongju Li","An Accurate and Fast Trace-aware Performance Estimation Model For Prioritized MPSoC Bus With Multiple Interfering Bus-Masters",,"IPSJ Trans. System LSI Design Methodology",,"Vol. 10",,"pp. 13-27",2017,Feb.