"Ryosuke Kuramochi,Masayuki Shimoda,Youki Sada,Shimpei Sato,Hiroki Nakahara","FPGA-based Accurate Pedestrian Detection with Thermal Camera for Surveillance System","The 2019 International Conference on Reconfigurable Computing and FPGAs (ReConFig 2019)",,,,,"pp. 1-5",2019,Dec.
"神宮司明良,佐藤真平,中原啓貴","Wide-SIMDを用いたISAベースのスパースCNNのFPGA実装",,"電子情報通信学会技術研究報告",,"Vol. 119","No. 287","pp. 9-14",2019,Nov.
"Naoto Soga,Shimpei Sato,Hiroki Nakahara","Energy-efficient ECG Signals Outlier Detection Hardware using a Sparse Robust Deep Autoencoder","The 22nd Workshop on Synthesis And System Integration of Mixed Information technologies (SASIMI 2019)",,,,,,2019,Oct.
"Ryosuke Kuramochi,Youki Sada,Masayuki Shimoda,Shimpei Sato,Hiroki Nakahara","Many Universal Convolution Cores for Ensemble Sparse Convolutional Neural Networks","IEEE 13th International Symposium on Embedded Multicore/Many-core Systems-on-Chip (MCSoC '19)",,,,,,2019,Oct.
"倉持亮佑,下田将之,佐田悠生,佐藤真平,中原啓貴","サーマル画像に対する歩行者検出とそのFPGA実装について",,"電子情報通信学会技術研究報告",,"Vol. 119","No. 208","pp. 31-36",2019,Sept.
"Hiroki Nakahara,Youki Sada,Masayuki Shimoda,Kouki Sayama,Akira Jinguji,Shimpei Sato","FPGA-Based Training Accelerator Utilizing Sparseness of Convolutional Neural Network",,,,,,,2019,Sept.
"佐山功起,佐藤真平,中原啓貴","深層学習のスパース性を用いた学習高速化手法に関する研究","第42回多値論理フォーラム",,,,"No. 4",,2019,Sept.
"鈴木裕太,曽我尚人,佐藤真平,中原啓貴","テーブル参照方式ニューラルネットワーク推論プロセッサにおける2値化と3値化の比較","第42回多値論理フォーラム",,,,"No. 3",,2019,Sept.
"Hiroki Nakahara,Haruyoshi Yonekawa,Tomoya Fujii,Masayuki Shimoda,Shimpei Sato","GUINNESS: A GUI based Binarized Deep Neural Network Framework for Software Programmers",,"IEICE Transactions on Information and Systems",,"Vol. E102-D","No. 5","pp. 1003-1011",2019,May
"Masayuki Shimoda,Shimpei Sato,Hiroki Nakahara","Power Efficient Object Detector with an Event-Driven Camera for Moving Object Surveillance on an FPGA",,"IEICE Transactions on Information and Systems",,"Vol. E102-D","No. 5","pp. 1020-1028",2019,May
"中原啓貴,佐藤真平","電波望遠鏡用デジタル分光器向け畳込みニューラルネットワークを用いた識別機に関して",,"電子情報通信学会技術研究報告",,"Vol. 119","No. 18","pp. 103-108",2019,May
"佐田悠生,下田将之,佐藤真平,中原啓貴","マルチパス構造を持つ意味的領域分割モデルのFPGA実装",,"電子情報通信学会技術研究報告",,"Vol. 119","No. 457","pp. 49-54",2019,May
"Atsuki Munakata,Hiroki Nakahara,Shimpei Sato","Noise Convolutional Neural Networks and FPGA Implementation","The 49th IEEE International Symposium on Multiple-Valued Logic (ISMVL '19)",,,,,,2019,May
"Hiroki Nakahara,Akira Jinguji,Masayuki Shimoda,Shimpei Sato","An FPGA-based Fine Tuning Accelerator for a Sparse CNN","The 27th International Symposium on Field-Programmable Gate Arrays (FPGA '19)",,,,,"pp. 186-186",2019,Feb.
"曽我尚人,佐藤真平,中原啓貴","Sparse Robust Deep Autoencoderによる心電図外れ値検出器のハードウェア向けモデル圧縮について",,"電子情報通信学会技術研究報告",,"vol. 118","no. 457","pp. 127-132",2019,Feb.
"中原啓貴,宗形敦樹,佐藤真平","雑音畳込みニューラルネットワークとその専用回路のFPGA実装に関して","第32回多値論理とその応用研究会",,,,,,2019,Jan.
"宗形敦樹,佐藤真平,中原啓貴","雑音畳み込みニューラルネットワークとFPGA実装",,"電子情報通信学会技術研究報告",,"vol. 118","no. 432","pp. 19-24",2019,Jan.
"下田将之,佐藤真平,中原啓貴","ディープニューロ・ファジィによる偽陰性数の削減とその専用回路のFPGA実装の検討","第32回多値論理とその応用研究会",,,,,,2019,Jan.
"曽我尚人,佐藤真平,中原啓貴","Sparse Robust Deep Autoencoderによる心電図外れ値検出器の小型ハードウェアへの実装","第32回多値論理とその応用研究会",,,,,,2019,Jan.
"佐田悠生,下田将之,佐藤真平,中原啓貴","Intel社OpenCLを用いた3状態CNNの実装に関して","第32回多値論理とその応用研究会",,,,,,2019,Jan.