"Kazuya Taniguchi,Satoshi Tayu,Atsushi Takahashi,Yukichi Todoroki,Makoto Minami","Bottleneck Channel Routing to Reduce the Area of Analog VLSI",,"Proc. the 24th Workshop on Synthesis And System Integration of Mixed Information technologies (SASIMI 2022)",,,,"pp. 26-31",2022,Oct.
"’JŒû˜a–í,“c“’’q,�‚‹´“ÄŽi,�Œ—S‹g,“ì�½","ƒAƒiƒ�ƒO�W�ωñ˜H–Ê�Ï�팸‚Ì‚½‚߂̃{ƒgƒ‹ƒlƒbƒNƒ`ƒƒƒlƒ‹”z�ü‚Ì’ñˆÄ","VLSI�ÝŒv‹Z�pŒ¤‹†‰ï","“dŽq�î•ñ’Ê�MŠw‰ï‹Z�pŒ¤‹†•ñ�� (VLD2021-77)",,"Vol. 121","No. 412","pp. 7-12",2022,Mar.