@book{CTT100794118, author = {Teerachot Siriburanon and Hanli Liu and Kenichi Okada and Akira Matsuzawa and Wei Deng and Satoshi Kondo and Makihiko Katsuragi and Kento Kimura}, title = {IoT and Low-Power Wireless: Circuits, Architectures, and Techniques}, publisher = {CRC Press}, year = 2018, } @book{CTT100793971, author = {Wei Deng and Teerachot Siriburanon and Ahmed Musa and Kenichi Okada and Akira Matsuzawa}, title = {Low Phase Noise Quadrature Frequency Synthesizer for 60 GHz Radios}, publisher = {}, year = 2014, } @article{CTT100803831, author = {Hanli Liu and Zheng Sun and Hongye Huang and Wei Deng and Teerachot Siriburanon and Jian Pang and Yun Wang and Rui Wu and Teruki Someya and Atsushi Shirane and Kenichi Okada}, title = {A 265-µW Fractional-N Digital PLL with Seamless Automatic Switching Sub-sampling/Sampling Feedback Path and Duty-Cycled Frequency-Locked Loop in 65nm CMOS}, journal = {IEEE Journal of Solid-State Circuits (JSSC)}, year = 2019, } @article{CTT100796054, author = {Bangan Liu and Huy Cu Ngo and Kengo Nakata and Wei Deng and Yuncheng Zhang and Junjun Qiu and Toru Yoshioka and Jun Emmei and Jian Pang and Tn Aravind and Haosheng Zhang and Dongsheng Yang and Hanli Liu and Teruki Someya and Atsushi Shirane and Kenichi Okada}, title = {A 0.4ps-Jitter -52dBc-Spur Synthesizable Injection-locked PLL with Self-clocked Non-overlap Update and Slope-balanced Sub-sampling BBPD}, journal = {IEEE Solid-State Circuits Letters (SSC-L)}, year = 2019, } @article{CTT100792783, author = {Hanli Liu and Zheng Sun and Dexian Tang and Hongye Huang and Tohru Kaneko and Zhijie Chen and Wei Deng and Rui Wu and Kenichi Okada}, title = {A DPLL-Centric Bluetooth Low-Energy Transceiver with a 2.3-mW Interference-Tolerant Hybrid-Loop Receiver in 65nm CMOS}, journal = {IEEE Journal of Solid-State Circuits}, year = 2018, } @article{CTT100796059, author = {Hanli Liu and Dexian Tang and Zheng Sun and Wei Deng and Huy Cu Ngo and Kenichi Okada}, title = {A Sub-mW Fractional-N ADPLL with FOM of -246dB for IoT Applications}, journal = {IEEE Journal of Solid-State Circuits (JSSC)}, year = 2018, } @article{CTT100789871, author = {Hanli Liu and Teerachot Siriburanon and Kengo Nakata and Wei Deng and Ju Ho Son and Dae Young Lee and Kenichi Okada and Akira Matsuzawa}, title = {A 28-GHz Fractional-N Frequency Synthesizer with Reference and Frequency Doublers for 5G Mobile Communications in 65nm CMOS}, journal = {IEICE Transactions on Electronics}, year = 2018, } @article{CTT100737555, author = {Tn Aravind and Wei Deng and Dongsheng Yang and Rui Wu and Kenichi Okada and Akira Matsuzawa}, title = {A Fully-Synthesizable 10.06Gbps 16.1mW Injection-Locked CDR in 28nm FDSOI}, journal = {IEICE Transactions on Electronics}, year = 2017, } @article{CTT100710997, author = {Tn Aravind and Makihiko Katsuragi and Kento Kimura and Satoshi Kondo and Korkut Kaan Tokgoz and Kengo Nakata and Wei Deng and Kenichi Okada and Akira Matsuzawa}, title = {A Fractional-N Sub-Sampling PLL Using a Pipelined Phase-Interpolator with an FoM of -250dB}, journal = {IEEE Journal of Solid-State Circuits}, year = 2016, } @article{CTT100710994, author = {Kenichi Okada and Teerachot Siriburanon and Satoshi Kondo and Kento Kimura and Tomohiro Ueno and Satoshi Kawashima and Tohru Kaneko and Wei Deng}, title = {A 2.2GHz -242dB-FOM 4.2mW ADC-PLL using Digital Sub-Sampling Architecture}, journal = {IEEE Journal of Solid-State Circuits}, year = 2016, } @article{CTT100710991, author = {Dongsheng Yang and Tomohiro Ueno and Wei Deng and Kengo Nakata and Tn Aravind and Rui Wu and Kenichi Okada and Akira Matsuzawa}, title = {A 0.0055mm2 480µW Synthesizable PLL using Stochastic TDC in 28nm FDSOI}, journal = {IEICE Transactions on Electronics}, year = 2016, } @article{CTT100710990, author = {Teerachot Siriburanon and Satoshi Kondo and Makihiko Katsuragi and Hanli Liu and Kento Kimura and Wei Deng and Kenichi Okada and Akira Matsuzawa}, title = {A Low-Power Low-Noise mm-Wave Sub-Sampling PLL using Dual-Step-Mixing ILFD and Tail-Coupling Quadrature Injection-Locked Oscillator for IEEE802.11ad}, journal = {IEEE Journal of Solid-State Circuits}, year = 2016, } @article{CTT100696616, author = {Dongsheng Yang and Wei Deng and Tn Aravind and Rui Wu and Bangan Liu and Kenichi Okada and Akira Matsuzawa}, title = {A Fully Synthesizable Injection-Locked PLL with Feedback Current Output DAC in 28nm FDSOI}, journal = {IEICE Electronics Express}, year = 2015, } @article{CTT100696614, author = {Teerachot Siriburanon and Wei Deng and Kenichi Okada and Akira Matsuzawa}, title = {A Constant-Current-Controlled Class-C Voltage-Controlled Oscillator using Self-Adjusting Replica Bias Circuit}, journal = {IEICE Transactions on Electronics}, year = 2015, } @article{CTT100683937, author = {Rui Wu and Wei Deng and Shinji Sato and Takuichi Hirano and Ning Li and Takeshi Inoue and Hitoshi Sakane and Kenichi Okada and Akira Matsuzawa}, title = {A 60-GHz CMOS Transmitter with Gain-Enhanced On-Chip Antenna for Short-Range Wireless Interconnections}, journal = {IEICE Transactions on Electronics}, year = 2015, } @article{CTT100676904, author = {Wei Deng and Dongsheng Yang and Tomohiro Ueno and Teerachot Siriburanon and Satoshi Kondo and Kenichi Okada and Akira Matsuzawa}, title = {A Fully Synthesizable All-digital PLL with Interpolative Phase Coupled Oscillator, Current-Output DAC, and Fine-resolution Digital Varactor Using Gated Edge Injection Technique}, journal = {IEEE Journal of Solid-State Circuits}, year = 2015, } @article{CTT100676903, author = {Wei Deng and Ahmed Musa and Kenichi Okada and Akira Matsuzawa}, title = {A Compact and Low-Power Fractionally Injection-Locked Quadrature Frequency Synthesizer using Self-synchronized Gating Injection Technique for Software-defined Radios}, journal = {IEEE Journal of Solid-State Circuits}, year = 2014, } @article{CTT100663596, author = {Ahmed Musa and Wei Deng and Teerachot Siriburanon and Masaya Miyahara and Kenichi Okada and Akira Matsuzawa}, title = {A Compact, Low Power and Low Jitter Dual-Loop Injection Locked PLL Using All-Digital PVT Calibration}, journal = {IEEE Journal of Solid-State Circuits}, year = 2014, } @article{CTT100652718, author = {Wei Deng and Teerachot Siriburanon and Ahmed Musa and Kenichi Okada and Akira Matsuzawa}, title = {A Sub-harmonic Injection-locked Quadrature Frequency Synthesizer with Frequency Calibration Scheme for Millimeter-wave TDD Transceivers}, journal = {IEEE Journal of Solid-State Circuits}, year = 2013, } @article{CTT100663598, author = {Teerachot Siriburanon and Takahiro Sato and Ahmed Musa and Wei Deng and Kenichi Okada and Akira Matsuzawa}, title = {A 20GHz Push-Push Voltage-Controlled Oscillator Using Second-Harmonic Peaking Technique for a 60GHz Frequency Synthesizer}, journal = {IEICE Transactions on Electronics}, year = 2013, } @article{CTT100652723, author = {Wei Deng and Kenichi Okada and Akira Matsuzawa}, title = {Class-C VCO with Amplitude Feedback Loop for Robust Start-up and Enhanced Oscillation Swing,}, journal = {IEEE Journal of Solid-State Circuits}, year = 2013, } @article{CTT100663757, author = {Wei Deng and Kenichi Okada and Akira Matsuzawa}, title = {A 0.5-V, 0.05-to-3.2 GHz LC-Based Clock Generator for Substituting Ring Oscillators under Low-Voltage Condition}, journal = {IEICE Transactions on Electronics}, year = 2012, } @inproceedings{CTT100841994, author = {Bangan Liu and Yuncheng Zhang and Junjun Qiu and Wei Deng and Zule Xu and Haosheng Zhang and Jian Pang and Yun Wang and Rui Wu and 染谷 晃基 and 白根 篤史 and 岡田 健一}, title = {A 21.7% System Power Efficiency Fully-Synthesizable Transmitter for sub-GHz IoT Applications}, booktitle = {}, year = 2019, } @inproceedings{CTT100841976, author = {Dingxin Xu and Hanli Liu and Zheng Sun and Hongye Huang and Wei Deng and Teerachot Siriburanon and Jian Pang and Yun Wang and Rui Wu and 染谷 晃基 and 白根 篤史 and 岡田 健一}, title = {A 265-µW Fractional-N Digital PLL with Switching Subsampling/Sampling Feedback}, booktitle = {}, year = 2019, } @inproceedings{CTT100841975, author = {Zheng Sun and Hanli Liu and Dexian Tang and Hongye Huang and 金子 徹 and Rui Wu and Wei Deng and 染谷 晃基 and 白根 篤史 and 岡田 健一}, title = {A T/R Switch Embedded BLE Transceiver with 2.6mW Harmonic-Suppressed Transmitter and 2.3mW Hybrid-Loop Receiver」,}, booktitle = {}, year = 2019, } @inproceedings{CTT100841945, author = {Bangan Liu and Yuncheng Zhang and Junjun Qiu and Wei Deng and Zule Xu and Haosheng Zhang and Jian Pang and Yun Wang and Rui Wu and Teruki Someya and Atsushi Shirane and Kenichi Okada}, title = {An HDL-described Fully-synthesizable Sub-GHz IoT Transceiver with Ring Oscillator Based Frequency Synthesizer and Digital Background EVM Calibration}, booktitle = {}, year = 2019, } @inproceedings{CTT100815502, author = {Zheng Sun and Hanli Liu and Dexian Tang and Hongye Huang and Tohru Kaneko and Rui Wu and Wei Deng and Teruki Someya and Atsushi Shirane and Kenichi Okada}, title = {A 0.85mm2 BLE Transceiver with Embedded T/R Switch, 2.6mW Fully-Passive Harmonic Suppressed Transmitter and 2.3mW Hybrid-Loop Receiver}, booktitle = {}, year = 2019, } @inproceedings{CTT100814907, author = {Hanli Liu and Zheng Sun and Hongye Huang and Wei Deng and Teerachot Siriburanon and Pang Jian and Yun Wang and Rui Wu and 染谷 晃基 and Atsushi Shirane and Kenichi Okada}, title = {A 265-µW Fractional-N Digital PLL with Seamless Automatic Switching Subsampling/Sampling Feedback Path and Duty-Cycled Frequency-Locked Loop in 65nm CMOS}, booktitle = {}, year = 2019, } @inproceedings{CTT100816084, author = {Hanli Liu and Zheng Sun and Hongye Huang and Wei Deng and Teerachot Siriburanon and Jian Pang and Yun Wang and Rui Wu and Teruki Someya and Atsushi Shirane and Kenichi Okada}, title = {A 265-µW Fractional-N Digital PLL with Seamless Automatic Switching Subsampling/Sampling Feedback Path and Duty-Cycled Frequency-Locked Loop in 65nm CMOS}, booktitle = {}, year = 2019, } @inproceedings{CTT100814784, author = {Bangan Liu and Huy Cu Ngo and Wei Deng and Yuncheng Zhang and Junjun Qiu and Kengo Nakata and Teruki Someya and Atsushi Shirane and Kenichi Okada}, title = {A 1.2 ps-Jitter Fully-Synthesizable DTC-based Fractional-N Injection-Locked PLL using True Arbitrary Nonlinearity Calibration}, booktitle = {}, year = 2018, } @inproceedings{CTT100800036, author = {Zheng Sun and Hanli Liu and Dexian Tang and Hongye Huang and Tohru Kaneko and Rui Wu and Wei Deng and Kenichi Okada}, title = {A 0.85mm2 BLE Transceiver with Embedded T/R Switch, 2.6mW Fully-Passive Harmonic Suppressed Transmitter and 2.3mW Hybrid-Loop Receiver}, booktitle = {}, year = 2018, } @inproceedings{CTT100798339, author = {Jian Pang and Rui Wu and Yun Wang and Masato Dome and Hisashi Kato and Hongye Huang and Tn Aravind and Hanli Liu and Wei Deng and Bangan Liu and Takeshi Nakamura and Takuya Fujimura and Masaru Kawabuchi and Ryo Kubozoe and Tsuyoshi Miura and Daiki Matsumoto and Naoki Oshima and Keiichi Motoi and Shinichi Hori and Kazuaki Kunihiro and Tomoya Kaneko and Kenichi Okada}, title = {A 28GHz CMOS Phased-Array Transceiver Using Gain-Invariant LO Phase Shifter with 0.1 Degree Beam-Steering Resolution for 5G New Radio}, booktitle = {}, year = 2018, } @inproceedings{CTT100814777, author = {Zheng Sun and Hanli Liu and Dexian Tang and Hongye Huang and 金子 徹 and Wei Deng and Rui Wu and 白根 篤史 and 岡田 健一}, title = {An ADPLL-Centric Bluetooth Low-Energy Transceiver with 2.3mW Interference-Tolerant Hybrid-Loop Receiver in 65nm CMOS}, booktitle = {}, year = 2018, } @inproceedings{CTT100814776, author = {Hongye Huang and Hanli Liu and Dexian Tang and Zheng Sun and Wei Deng and Huy Cu Ngo and 白根 篤史 and 岡田 健一}, title = {An Ultra-Low-Power Fractional-N All-Digital PLL Using 10-bit Isolated Constant-Slope Digital-to-Time Converter}, booktitle = {}, year = 2018, } @inproceedings{CTT100816255, author = {Bangan Liu and Huy Cu Ngo and Kengo Nakata and Wei Deng and Yuncheng Zhang and Junjun Qiu and Toru Yoshioka and Jun Emmei and Haosheng Zhang and Jian Pang and Tn Aravind and Dongsheng Yang and Hanli Liu and Kenichi Okada and Akira Matsuzawa}, title = {A 1.2 ps-Jitter Fully-Synthesizable Fully-Calibrated Fractional-N Injection-Locked PLL Using True Arbitrary Nonlinearity Calibration Technique}, booktitle = {}, year = 2018, } @inproceedings{CTT100790010, author = {Hanli Liu and Dexian Tang and Zheng Sun and Wei Deng and Huy Cu Ngo and Kenichi Okada and Akira Matsuzawa}, title = {A 0.98mW Fractional-N ADPLL Using 10b Isolated Constant-Slope DTC with FoM of -246dB for IoT Applications in 65nm CMOS}, booktitle = {}, year = 2018, } @inproceedings{CTT100790009, author = {Hanli Liu and Zheng Sun and Dexian Tang and Hongye Huang and Tohru Kaneko and Wei Deng and Rui Wu and Kenichi Okada and Akira Matsuzawa}, title = {An ADPLL-Centric Bluetooth Low-Energy Transceiver with 2.3mW Interference-Tolerant Hybrid-Loop Receiver and 2.9mW Single-Point Polar Transmitter in 65nm CMOS}, booktitle = {}, year = 2018, } @inproceedings{CTT100790073, author = {Hanli Liu and Teerachot Siriburanon and Kengo Nakata and Wei Deng and Kenichi Okada and Akira Matsuzawa}, title = {A 28GHz Fractional-N Frequency Synthesizer with Reference and Frequency Doublers for 5G New Radio}, booktitle = {}, year = 2017, } @inproceedings{CTT100737561, author = {Dongsheng Yang and Wei Deng and Bangan Liu and Tn Aravind and Teerachot Siriburanon and Kenichi Okada and Akira Matsuzawa}, title = {An HDL-Synthesized Injection-Locked PLL Using LC-Based DCO for On-chip Clock Generation}, booktitle = {}, year = 2017, } @inproceedings{CTT100734469, author = {Dongsheng Yang and Wei Deng and Yuki Terashima and Teerachot Siriburanon and Tn Aravind and Toru Yoshioka and Kenichi Okada and Akira Matsuzawa}, title = {An LC-VCO based Synthesizable Injection-Locked PLL with an FoM of -250.3dB}, booktitle = {}, year = 2016, } @inproceedings{CTT100702378, author = {Dongsheng Yang and Wei Deng and 中田 憲吾 and Teerachot Siriburanon and 岡田 健一 and 松澤 昭}, title = {A Fully Synthesized Fractional-N IL-PLL Using Only Digital Library}, booktitle = {}, year = 2016, } @inproceedings{CTT100702367, author = {Dongsheng Yang and Wei Deng and Tharayil Narayanan Aravind and Kengo Nakata and Teerachot Siriburanon and Kenichi Okada and Akira Matsuzawa}, title = {An Automatic Place-and-Routed Two-Stage Fractional-N Injection-locked PLL Using Soft Injection}, booktitle = {}, year = 2016, } @inproceedings{CTT100696618, author = {Teerachot Siriburanon and Liu Hanli and Kengo Nakata and Wei Deng and Ju Ho Son and Dae Young Lee and Kenichi Okada and Akira Matsuzawa}, title = {A 28-GHz Fractional-N Frequency Synthesizer with Reference and Frequency Doublers for 5G Cellular}, booktitle = {}, year = 2015, } @inproceedings{CTT100696619, author = {Aravind Tharayil Narayanan and Makihiko Katsuragi and Kento Kimura and Satoshi Kondo and Korkut Kaan Tokgoz and Yuki Terashima and Wei Deng and Kenichi Okada and Akira Matsuzawa}, title = {A Fractional-N Sub-Sampling PLL using a Pipelined Phase-Interpolator with an FoM of -246dBc/Hz}, booktitle = {}, year = 2015, } @inproceedings{CTT100691242, author = {中田 憲吾 and Wei Deng and Dongsheng Yang and 上野 智大 and THARAYILNAARAVIND and Teerachot Siriburanon and 近藤 智史 and 岡田 健一 and 松澤 昭}, title = {注入同期を利用した自動合成配置配線可能なAll Digital Synthesizable PLL}, booktitle = {}, year = 2015, } @inproceedings{CTT100684033, author = {.Wei Deng and Dongsheng Yang and Aravind Tharayil Narayanan, and Kengo Nakata and Teerachot Siriburanon and Kenichi Okada and Akira Matsuzawa}, title = {A 0.048-mm2 3-mW Synthesizable Fractional-N PLL with a Soft Injection-Locking Technique}, booktitle = {}, year = 2015, } @inproceedings{CTT100683952, author = {Rui Wu and Qinghong Bu and Wei Deng and 岡田 健一 and 松澤 昭}, title = {An Ultra-Compact 60-GHz Wake-Up Receiver by Reconfiguring Multi-Stage LNAs}, booktitle = {}, year = 2015, } @inproceedings{CTT100683949, author = {Teerachot Siriburanon and 近藤 智史 and 木村 健将 and 上野 智大 and 川嶋 理史 and 金子 徹 and Wei Deng and 宮原 正也 and 岡田 健一 and 松澤 昭}, title = {A Digital Sub-sampling ADC-PLL with -112dBc/Hz In-band Phase Noise and 380fsrms Jitter}, booktitle = {}, year = 2015, } @inproceedings{CTT100679635, author = {Wei Deng and Dongsheng Yang and Tn Aravind and Kengo Nakata and Teerachot Siriburanon and Kenichi Okada and Akira Matsuzawa}, title = {A 0.048-mm2 3-mW Synthesizable Fractional-N PLL with a Soft Injection-Locking Technique}, booktitle = {}, year = 2015, } @inproceedings{CTT100679637, author = {Teerachot Siriburanon and Satoshi Kondo and Kento Kimura and Tomohiro Ueno and Satoshi Kawashima and Tohru Kaneko and Wei Deng and Masaya Miyahara and Kenichi Okada and Akira Matsuzawa}, title = {A 2.2-GHz -242dB-FoM 4.2-mW ADC-PLL Using Digital Sub-Sampling Architecture}, booktitle = {}, year = 2015, } @inproceedings{CTT100679630, author = {Teerachot Siriburanon and Tomohiro Ueno and Kento Kimura and Satoshi Kondo and Wei Deng and Kenichi Okada and Akira Matsuzawa}, title = {A 58.3-to-65.4GHz 34.2mW Sub-Harmonically Injection-Locked PLL with a Sub-Sampling Phase Detection,}, booktitle = {}, year = 2015, } @inproceedings{CTT100679629, author = {Tn Aravind and Wei Deng and Kenichi Okada and Akira Matsuzawa}, title = {A Tail-Current Modulated VCO with Adaptive-Bias Scheme}, booktitle = {}, year = 2015, } @inproceedings{CTT100679631, author = {Dongsheng Yang and Wei Deng and Tomohiro Ueno and Teerachot Siriburanon and Satoshi Kondo and Kenichi Okada and Akira Matsuzawa}, title = {An HDL-Synthesized Gated-Edge-Injection PLL with A Current Output DAC}, booktitle = {}, year = 2015, } @inproceedings{CTT100679603, author = {Tn Aravind and Kento Kimura and Wei Deng and Kenichi Okada and Akira Matsuzawa}, title = {A Pulse-Driven VCO with Enhanced Efficiency}, booktitle = {}, year = 2014, } @inproceedings{CTT100676973, author = {AravindTharayil Narayanan and Wei Deng and Yang Dongsheng and Wu Rui and Kenichi Okada and Akira Matsuzawa}, title = {A 0.011 mm2 PVT‐Robust Fully‐Synthesizable CDR with a Data Rate of 10.05 Gb/S Using Injection‐}, booktitle = {}, year = 2014, } @inproceedings{CTT100680392, author = {Aravind Tharayil Narayanan and Wei Deng and Kenichi Okada and Akira Matsuzawa}, title = {A Tail-Current Modulated VCO with Adaptive Start-up Scheme}, booktitle = {}, year = 2014, } @inproceedings{CTT100679621, author = {Aravind Tharayil Narayanan and Wei Deng and Kenichi Okada and Akira Matsuzawa}, title = {A Tail-Current Modulated VCO with Adaptive Startup Scheme}, booktitle = {}, year = 2014, } @inproceedings{CTT100676918, author = {Teerachot Siriburanon and Tomohiro Ueno and Kento Kimura and Satoshi Kondo and Wei Deng and Kenichi Okada and Akira Matsuzawa}, title = {A 60-GHz Sub-Sampling PLL Using A Dual-Step-Mixing ILFD,(invited)}, booktitle = {}, year = 2014, } @inproceedings{CTT100676921, author = {Rui Wu and Qinghong Bu and Wei Deng and Kenichi Okada and Akira Matsuzawa}, title = {A 0.015-mm2 60-GHz Reconfigurable Wake-Up Receiver by Reusing Multi-Stage LNAs}, booktitle = {}, year = 2014, } @inproceedings{CTT100676972, author = {Aravind Tharayil Narayanan and Wei Deng and Kenichi Okada and Akira Matsuzawa}, title = {A Tail-Feedback VCO with Self-Adjusting Current Modulation Scheme}, booktitle = {}, year = 2014, } @inproceedings{CTT100676913, author = {Wu Rui and Wei Deng and Shinji Sato and Takuichi Hirano and Ning Li and Takeshi Inoue and Hitoshi Sakane and Kenichi Okada and Akira Matsuzawa}, title = {A 60-GHz Efficiency-Enhanced On-Chip Dipole Antenna Using Helium-3 Ion Implantation Process}, booktitle = {}, year = 2014, } @inproceedings{CTT100676971, author = {Aravind Tharayil Narayanan and Kento Kimura and Wei Deng and Kenichi Okada and Akira Matsuzawa}, title = {A Pulse-Driven LC-VCO with a Figure-of-Merit of -192dBc/Hz,}, booktitle = {}, year = 2014, } @inproceedings{CTT100673715, author = {Teerachot Siriburanon and Tomohiro Ueno and Kento Kimura and Satoshi Kondo and Wei Deng and Kenichi Okada and Akira Matsuzawa}, title = {A 60-GHz Sub-Sampling Frequency Synthesizer Using Sub-Harmonic Injection-Locked Quadrature Oscillators}, booktitle = {}, year = 2014, } @inproceedings{CTT100673714, author = {Rui Wu and Wei Deng and Shinji Sato and Takuichi Hirano and Ning Li and Takeshi Inoue and Hitoshi Sakane and Kenichi Okada and Akira Matsuzawa}, title = {A 17-mW 5-Gb/s 60-GHz CMOS Transmitter with Efficiency-Enhanced On-Chip Antenna}, booktitle = {}, year = 2014, } @inproceedings{CTT100673643, author = {Wei Deng and Dongsheng Yang and Tomohiro Ueno and Teerachot Siriburanon and Satoshi Kondo and Kenichi Okada and Akira Matsuzawa}, title = {A 0.0066mm2 780µW Fully Synthesizable PLL with a Current Output DAC and an Interpolative-Phase Coupled Oscillator using Edge Injection Technique}, booktitle = {}, year = 2014, } @inproceedings{CTT100668089, author = {Dongsheng Yang and Wei Deng and Teerachot Siriburanon and 岡田 健一 and 松澤 昭}, title = {A 0.4ps/bit Digitally-controlled Varactor for a Fully Synthesizable DCO}, booktitle = {}, year = 2014, } @inproceedings{CTT100668095, author = {Teerachot Siriburanon and Wei Deng and Ahmed Magdi Hassan Musa and Kenichi Okada and Akira Matsuzawa}, title = {A Dual-Step-Mixing ILFD using a Direct Injection Technique for High-Order Division Ratios in 60GHz Applications}, booktitle = {}, year = 2014, } @inproceedings{CTT100668090, author = {Wei Deng and Dongsheng Yang and Tomohiro Ueno and Teerachot Siriburanon and Kenichi Okada and Akira Matsuzawa}, title = {Digitally Synthesized PLL with a DAC and Phase-Coupled Oscillator using Standard Cells Only}, booktitle = {}, year = 2014, } @inproceedings{CTT100668041, author = {Wei Deng and Dongsheng Yang and Tomohiro Ueno and Teerachot Siriburanon and Satoshi Kondo and Kenichi Okada and Akira Matsuzawa}, title = {A 0.0066-mm2 780-µW Fully Synthesizable PLL with a Current Output DAC and an Interpolative-Phase Coupled Oscillator using Edge Injection Technique}, booktitle = {}, year = 2014, } @inproceedings{CTT100668031, author = {Wei Deng and Ahmed Musa and Teerachot Siriburanon and Masaya Miyahara and Kenichi Okada and Akira Matsuzawa}, title = {A Dual-loop Injection-locked PLL with All-digital Background Calibration System for On-chip Clock Generation}, booktitle = {}, year = 2014, } @inproceedings{CTT100668030, author = {Teerachot Siriburanon and Wei Deng and Kenichi Okada and Akira Matsuzawa}, title = {A Swing-Enhanced Current-Reuse Class-C VCO with Dynamic Bias Control Circuits}, booktitle = {}, year = 2014, } @inproceedings{CTT100668028, author = {.Teerachot Siriburanon and Wei Deng and Ahmed Musa and Kenichi Okada and Akira Matsuzawa}, title = {A Dual-Step-Mixing ILFD using a Direct Injection Technique for High-Order Division Ratios in 60GHz Applications}, booktitle = {}, year = 2013, } @inproceedings{CTT100668083, author = {Teerachot Siriburanon and Wei Deng and Ahmed Musa and 岡田 健一 and 松澤 昭}, title = {A Divide-by-4 and Divide-by-6 Injection-locked Frequency Divider using Even-Harmonic Direct Injection Method for V-band Applications}, booktitle = {}, year = 2013, } @inproceedings{CTT100663606, author = {Teerachot Siriburanon and Wei Deng and Kenichi Okada and Akira Matsuzawa}, title = {A Constant-Current-Controlled Class-C VCO using a Self-Adjusting Replica Biasing Scheme}, booktitle = {}, year = 2013, } @inproceedings{CTT100663643, author = {Teerachot Siriburanon and Wei Deng and 岡田 健一 and 松澤 昭}, title = {A Current-Reuse Class-C VCO using Dynamic Start-up Circuits}, booktitle = {電子情報通信学会ソサイエティ大会講演論文集}, year = 2013, } @inproceedings{CTT100663614, author = {Teerachot Siriburanon and Wei Deng and Ahmed Musa and Kenichi Okada and Akira Matsuzawa}, title = {A 13.2% Locking-Range Divide-by-6, 3.1mW, ILFD Using Even-Harmonic-Enhanced Direct Injection Technique for Millimeter-Wave PLLs}, booktitle = {}, year = 2013, } @inproceedings{CTT100652731, author = {Teerachot Siriburanon and Wei Deng and Kenichi Okada and Akira Matsuzawa}, title = {A Current-Reuse Class-C LC-VCO with an Adaptive Bias Scheme,}, booktitle = {}, year = 2013, } @inproceedings{CTT100652755, author = {Wei Deng and Ahmed Musa and Teerachot Siriburanon and 宮原 正也 and 岡田 健一 and 松澤 昭}, title = {A Dual-Loop Injection-Locked PLL with All-Digital PVT Calibration System}, booktitle = {}, year = 2013, } @inproceedings{CTT100652750, author = {Wei Deng and Ahmed Musa and Teerachot Siriburanon and 宮原 正也 and 岡田 健一 and 松澤 昭}, title = {A PVT-tolerant Dual-loop Injection-locked PLL for Clock Generation}, booktitle = {}, year = 2013, } @inproceedings{CTT100652749, author = {Wei Deng and Ahmed Musa and Teerachot Siriburanon and 宮原 正也 and 岡田 健一 and 松澤 昭}, title = {A 0.022mm2 970µW Injection-Locked PLL with -243dB FOM using Synthesizable All-Digital PVT Calibration Circuits}, booktitle = {}, year = 2013, } @inproceedings{CTT100652738, author = {Teerachot Siriburanon and Wei Deng and Ahmed Musa and Kenichi Okada and Akira Matsuzawa}, title = {A 60GHz PVT-Tolerant Injection-locked Frequency Synthesizer with a Background Calibration Technique}, booktitle = {}, year = 2013, } @inproceedings{CTT100652736, author = {Wei Deng and Ahmed Musa and Teerachot Siriburanon and Masaya Miyahara and Kenichi Okada and Akira Matsuzawa}, title = {A 0.022mm2 970µW Injection-Locked PLL with -243dB FOM using Synthesizable All-Digital PVT Calibration Circuits}, booktitle = {}, year = 2013, } @inproceedings{CTT100652741, author = {Teerachot Siriburanon and Wei Deng and Ahmed Musa and Kenichi Okada and Akira Matsuzawa}, title = {A Sub-harmonic Injection-locked Frequency Synthesizer with Frequency Calibration Scheme for Use in 60GHz TDD Transceivers}, booktitle = {}, year = 2013, } @inproceedings{CTT100652740, author = {Wei Deng and Teerachot Siriburanon and Ahmed Musa and Kenichi Okada and Akira Matsuzawa}, title = {A Fractional-N Harmonic Injection-locked Frequency Synthesizer with 10MHz-6.6GHz Quadrature Outputs for Software-Defined Radios}, booktitle = {}, year = 2013, } @inproceedings{CTT100652743, author = {Teerachot Siriburanon and Takahiro Sato and Ahmed Musa and Wei Deng and Kenichi Okada and Akira Matsuzawa}, title = {A 20 GHz Push-Push Voltage-Controlled Oscillator for a 60 GHz Frequency Synthesizer}, booktitle = {}, year = 2012, } @inproceedings{CTT100652799, author = {Teerachot Siriburanon and Wei Deng and Ahmed Musa and Kenichi Okada and Akira Matsuzawa}, title = {A 60GHz PVT-tolerant Injection-locked Frequency Synthesizer with a Background Frequency Calibration Technique}, booktitle = {}, year = 2012, } @inproceedings{CTT100652793, author = {Wei Deng and Ahmed Musa and Kenichi Okada and Akira Matsuzawa}, title = {A 10MHz-6.6GHz Quadrature-Output Frequency Synthesizer for Multi-band Transceivers}, booktitle = {}, year = 2012, } @inproceedings{CTT100652744, author = {Wei Deng and Ahmed Musa and Kenichi Okada and Akira Matsuzawa}, title = {A 0.38mm2, 10MHz-6.6GHz Quadrature Frequency Synthesizer Using Fractional-N Injection-Locked Technique}, booktitle = {}, year = 2012, } @inproceedings{CTT100640127, author = {Wei Deng and Teerachot Siriburanon and Ahmed Musa and Kenichi Okada and Akira Matsuzawa}, title = {"A 58.1-to-65.0GHz Frequency Synthesizer with Background Calibration for Millimeter-wave TDD Transceivers,"}, booktitle = {}, year = 2012, } @inproceedings{CTT100652811, author = {Teerachot Siriburanon and Takahiro Sato and Ahmed Musa and Wei Deng and Kenichi Okada and Akira Matsuzawa}, title = {A 20GHz Push-Push Voltage-Controlled Oscillator for a MM-Wave Frequency Synthesizer}, booktitle = {}, year = 2012, } @inproceedings{CTT100634831, author = {Wei Deng and Kenichi Okada and Akira Matsuzawa}, title = {A Startup Ensured Class-C VCO with Enhanced Oscillation Swing}, booktitle = {}, year = 2012, } @inproceedings{CTT100634770, author = {Wei Deng and Kenichi Okada and Akira Matsuzawa}, title = {A PVT-robust Feedback Class-C VCO Using an Oscillation Swing Enhancement Technique}, booktitle = {}, year = 2012, } @inproceedings{CTT100627495, author = {Teerachot Siriburanon and Wei Deng and Kenichi Okada and Akira Matsuzawa}, title = {A Wide Frequency Range 60GHz Static Frequency Divider Using Shunt-Series Peaking}, booktitle = {}, year = 2011, } @inproceedings{CTT100627291, author = {Wei Deng and Kenichi Okada and Akira Matsuzawa}, title = {"A Feedback Class-C VCO with Robust Startup Condition over PVT Variations and Enhanced Oscillation Swing,"}, booktitle = {}, year = 2011, } @inproceedings{CTT100627475, author = {Wei Deng and Kenichi Okada and Akira Matsuzawa}, title = {"A 25MHz-6.44GHz LC-VCO Using a 5-port Inductor for Multi-band Frequency Generation"}, booktitle = {}, year = 2011, } @inproceedings{CTT100627452, author = {竹内 康揚 and 原 翔一 and ウェイ デン and 岡田 健一 and 松澤 昭}, title = {ソフトウェア無線へ向けたCMOSマルチバンド電圧制御発振器の研究}, booktitle = {}, year = 2011, } @inproceedings{CTT100620054, author = {"Wei Deng and Kenichi Okada and Akira Matsuzawa}, title = {A 25MHz-6.44GHz LC-VCO Using a 5-port Inductor for Multi-band Frequency Generation}, booktitle = {}, year = 2011, } @inproceedings{CTT100620044, author = {Wei Deng and Kenichi Okada and Akira Matsuzawa}, title = {Design of 0.5-V LC-VCO for Low-voltage and Low-jitter Clock Generator}, booktitle = {}, year = 2011, } @inproceedings{CTT100620058, author = {Wei Deng and Kenichi Okada and Akira Matsuzawa}, title = {An Ultra-Low-Voltage LC-VCO with a Frequency Extension Circuit for Future 0.5-V Clock Generation}, booktitle = {}, year = 2011, } @inproceedings{CTT100628294, author = {Wei Deng and Kenichi Okada and Akira Matsuzawa}, title = {Phase noise scaling of LC voltage-controlled oscillator for future 0.5-V sub-picosecond-jitter clock generation}, booktitle = {}, year = 2010, } @inproceedings{CTT100620062, author = {Wei Deng and Kenichi Okada and Akira Matsuzawa}, title = {"A 0.5-V, 0.05-to-3.2 GHz, 4.1-to-6.4 GHz LC-VCO using E-TSPC frequency divider with forward body bias for sub-picosecond jitter clock generation"}, booktitle = {}, year = 2010, } @inproceedings{CTT100620066, author = {Wei Deng and Kenichi Okada and Akira Matsuzawa}, title = {Phase Noise Scaling of LC-VCO for Ultra Low Supply Voltage}, booktitle = {}, year = 2010, }