@inproceedings{CTT100782202,
  author = {Makoto Saitoh and Elsayed A. Elsayed and Thiem Van Chu and Susumu Mashimo and Kenji Kise},
  title = {A High-Performance and Cost-Effective Hardware Merge Sorter without Feedback Datapath},
  booktitle = {},
  year = 2018,
}

@inproceedings{CTT100768544,
  author = {Susumu Mashimo and Thiem Van Chu and Kenji Kise},
  title = {High-Performance Hardware Merge Sorter},
  booktitle = {Proceedings IEEE 25th Annual International Symposium on Field-Programmable Custom Computing Machines FCCM 2017},
  year = 2017,
}

@inproceedings{CTT100749828,
  author = {齋藤 誠 and 眞下 達 and Chu Van Thiem and 吉瀬 謙二},
  title = {FPGAを用いたソーティングアクレラレータのためのマージネットワークの改良},
  booktitle = {},
  year = 2016,
}

@inproceedings{CTT100749819,
  author = {Susumu Mashimo and Thiem Van Chu and Kenji Kise},
  title = {Cost-Effective and High-Throughput Merge Network Architecture for the Fastest FPGA Sorting Accelerator},
  booktitle = {},
  year = 2016,
}

@inproceedings{CTT100704163,
  author = {Susumu Mashimo and Yuki Matsuda and Kenji Kise},
  title = {Fast Merge Network for Sorting on FPGA},
  booktitle = {},
  year = 2016,
}

@inproceedings{CTT100704172,
  author = {藤浪 将 and 眞下 達 and 吉瀬 謙二},
  title = {Verilog HDLで記述するRISC-V命令セットのアウトオフオーダ実行プロセッサ},
  booktitle = {},
  year = 2016,
}

@inproceedings{CTT100704170,
  author = {臼井 琢真 and 眞下 達 and 松田 裕貴 and 小林 諒平 and 吉瀬 謙二},
  title = {世界最速のFPGAソーティングアクセラレータの初期検討},
  booktitle = {},
  year = 2016,
}

@misc{CTT100793196,
  author = {吉瀬謙二 and 眞下達},
  title = {データソート装置},
  howpublished = {公開特許},
  year = 2018,
  month  = {},
  note   = {特願2017-097111(2017/05/16), 特開2018-194994(2018/12/06)}
}


@misc{CTT100787099,
  author = {吉瀬謙二 and 眞下達},
  title = {データソート装置},
  howpublished = {公開特許},
  year = 2018,
  month  = {},
  note   = {特願2017-050485(2017/03/15), 特開2018-156189(2018/10/04)}
}