論文

• Yun Wang, Dongwon You, Xi Fu, Takeshi Nakamura, Ashbir Aviat Fadila, Teruki Someya, Atsuhiro Kawaguchi, Junjun Qiu, Jian Pang, Kiyoshi Yanagisawa, Bangan Liu, Yuncheng Zhang, Haosheng Zhang, Rui Wu, Shunichiro Masaki, Daisuke Yamazaki, Atsushi Shirane, Kenichi Okada. A Ka-Band SATCOM Transceiver in 65-nm CMOS with High-Linearity TX and Dual-Channel Wide-Dynamic-Range RX for Terrestrial Termina, IEEE Journal of Solid-State Circuits, IEEE, Vol. 57, No. 2, pp. 356-370, Feb. 2022.
• Yun Wang, Rui Wu, Jian Pang, Dongwon You, Ashbir Aviat Fadila, Rattanan Saengchan, Xi Fu, Daiki Matsumoto, Takeshi Nakamura, Ryo Kubozoe, Masaru Kawabuchi, Bangan Liu, Haosheng Zhang, Junjun Qiu, Hanli Liu, Naoki Oshima, Keiichi Motoi, Shinichi Hori, Kazuaki Kunihiro, Tomoya Kaneko, Atsushi Shirane, Kenichi Okada. A 39-GHz 64-Element Phased-Array Transceiver with Built-in Phase and Amplitude Calibration for Large-Array 5G NR in 65-nm CMOS, IEEE Journal of Solid-State Circuits, Vol. 55, No. 5, pp. 1249-1269, May 2020.
• Bangan Liu, Yuncheng Zhang, Junjun Qiu, Hongye Huang, Zheng Sun, Dingxin Xu, Haosheng Zhang, Yun Wang, Jian Pang, Zheng Li, Xi Fu, Atsushi Shirane, Hitoshi Kurosu, Yoshinori Nakane, Shunichiro Masaki, Kenichi Okada. A Fully-Synthesizable Fractional-N Injection-Locked PLL for Digital Clocking with Triangle/Sawtooth Spread-Spectrum Modulation Capability in 5-nm CMOS, IEEE Solid-State Circuits Letters, Vol. 3, pp. 34-37, Jan. 2020.
• Haosheng Zhang, Herdian Hans, Tn Aravind, Atsushi Shirane, Mitsuru Suzuki, Kazuhiro Harasaka, Kazuhiko Adachi, Shigeyoshi Goka, Shinya Yanagimachi, Kenichi Okada. ULPAC: A Miniaturized Ultralow-Power Atomic Clock, IEEE Journal of Solid-State Circuits (JSSC), Vol. 54, No. 11, pp. 3135-3148, Nov. 2019.
• Yun Wang, Bangan Liu, Rui Wu, Hanli Liu, Tn Aravind, Jian Pang, Ning Li, Toru Yoshioka, Yuki Terashima, Haosheng Zhang, Dexian Tang, Makihiko Katsuragi, Daeyoung Lee, Sungtae Choi, Kenichi Okada, Akira Matsuzawa. A 60-GHz 3.0Gb/s Spectrum Efficient BPOOK Transceiver for Low-power Short-range Wireless in 65-nm CMOS, IEEE Journal of Solid-State Circuits (JSSC), Vol. 54, No. 5, pp. 1363-1374, May 2019.
• Haosheng Zhang, Tn Aravind, Hans Herdian, Bangan Liu, Rui Wu, Atsushi Shirane, Kenichi Okada. A Power-Efficient Pulse-VCO for Chip-Scale Atomic Clock, IEICE Transactions on Electronics, Vol. E102-C, No. 4, pp. 276-286, Apr. 2019.
• Bangan Liu, Huy Cu Ngo, Kengo Nakata, Wei Deng, Yuncheng Zhang, Junjun Qiu, Toru Yoshioka, Jun Emmei, Jian Pang, Tn Aravind, Haosheng Zhang, Dongsheng Yang, Hanli Liu, Teruki Someya, Atsushi Shirane, Kenichi Okada. A 0.4ps-Jitter -52dBc-Spur Synthesizable Injection-locked PLL with Self-clocked Non-overlap Update and Slope-balanced Sub-sampling BBPD, IEEE Solid-State Circuits Letters (SSC-L), Vol. 2, No. 1, pp. 5-8, Jan. 2019.
• Bangan Liu, Yun Wang, Jian Pang, Haosheng Zhang, Dongsheng Yang, Tn Aravind, Dae-Young Lee, SungTae Choi, Rui Wu, Kenichi Okada, Akira Matsuzawa. A Low-Power Pulse-Shaped Duobinary ASK Modulator for IEEE 802.11ad Compliant 60GHz Transmitter in 65nm CMOS, IEICE Transactions on Electronics, Vol. E101-C, No. 2, pp. 126-134, Feb. 2018.

国際会議発表 (査読有り)

• Hans Herdian, Haosheng Zhang, Aravind Tharayil Narayanan, Atsushi Shirane, Kenichi Okada. 10GHz Varactor-less VCO with Helium-3 Ion Irradiated Inductor, IEEE Asia-Pacific Microwave Conference (APMC), Dec. 2019.
• Yun Wang, Rui Wu, Jian Pang, Dongwon You, Ashbir Aviat Fadila, Rattanan Saengchan, Xi Fu, Daiki Matsumoto, Takeshi Nakamura, Ryo Kubozoe, Masaru Kawabuchi, Bangan Liu, Haosheng Zhang, Junjun Qiu, Hanli Liu, Naoki Oshima, Keiichi Motoi, Shinichi Hori, Kazuaki Kunihiro, Tomoya Kaneko, Atsushi Shirane, Kenichi Okada. A 39GHz Phased-Array CMOS Transceiver with Built-in Calibration for Large-Array 5G NR, IEEE Radio Frequency Integrated Circuits Symposium (RFIC), June 2019.
• Haosheng Zhang, Aravind Tharayil Narayanan, Hans Herdian, Bangan Liu, Yun Wang, Atsushi Shirane, Kenichi Okada. 0.2mW 70fsrms-Jitter Injection-Locked PLL Using De-Sensitized SSPD-Based Injecting-Time Self-Alignment Achieving -270dB FoM and -66dBc Reference Spur, IEEE Symposium on VLSI Circuits (VLSI Circuits), June 2019.
• Bangan Liu, Yuncheng Zhang, Junjun Qiu, Wei Deng, Zule Xu, Haosheng Zhang, Jian Pang, Yun Wang, Rui Wu, Teruki Someya, Atsushi Shirane, Kenichi Okada. An HDL-described Fully-synthesizable Sub-GHz IoT Transceiver with Ring Oscillator Based Frequency Synthesizer and Digital Background EVM Calibration, IEEE Custom Integrated Circuits Conference (CICC), Apr. 2019.
• Haosheng Zhang, Hans Herdian, Tn Aravind, Atsushi Shirane, Mitsuru Suzuki, Kazuhiro Harasaka, Kazuhiko Adachi, Shinya Yanagimachi, Kenichi Okada. Ultra-Low-Power Atomic Clock for Satellite Constellation with 2.2x10-12 Long-Term Allan Deviation Using Cesium Coherent Population Trapping, IEEE International Solid-State Circuits Conference (ISSCC), pp. 462-463, Feb. 2019.
• Haosheng Zhang, Hans Herdian, Tn Aravind, Bangan Liu, Rui Wu, Atsushi Shirane, Kenichi Okada. A -194 dBc/Hz FoM VCO with Low-Supply Sensitivity for Ultra-Low-Power Atomic Clock, IEEE Asia-Pacific Microwave Conference (APMC), Nov. 2018.
• Bangan Liu, Huy Cu Ngo, Kengo Nakata, Wei Deng, Yuncheng Zhang, Junjun Qiu, Toru Yoshioka, Jun Emmei, Haosheng Zhang, Jian Pang, Tn Aravind, Dongsheng Yang, Hanli Liu, Kenichi Okada, Akira Matsuzawa. A 1.2 ps-Jitter Fully-Synthesizable Fully-Calibrated Fractional-N Injection-Locked PLL Using True Arbitrary Nonlinearity Calibration Technique, IEEE Custom Integrated Circuits Conference (CICC), Apr. 2018.
• Haosheng Zhang, Tn Aravind, Bangan Liu, Kenichi Okada, Akira Matsuzawa. A Pulse VCO With Tail-filter, IEEE Asia-Pacific Microwave Conference, Nov. 2017.
• Yun Wang, Bangan Liu, Hanli Liu, Tn Aravind, Jian Pang, Ning Li, Toru Yoshioka, Yuki Terashima, Haosheng Zhang, Dexian Tang, Makihiko Katsuragi, Daeyoung Lee, Sungtae Choi, Rui Wu, Kenichi Okada, Akira Matsuzawa. A 100mW 3.0Gb/s Spectrum Efficient 60GHz Bi-Phase OOK CMOS Transceiver, IEEE Symposium on VLSI Circuits, June 2017.

国内会議発表 (査読なし・不明)

• Xi Fu, Yun Wang, Dongwon You, 中村 岳資, Ashbir Aviat Fadila, 染谷 晃基, 川口 敦広, Jian Pang, 柳澤 潔, Bangan Liu, Yuncheng Zhang, Haosheng Zhang, Rui Wu, 白根 篤史, 岡田 健一. Millimeter-wave CMOS High-linearity Transmitter for Satellite Communication System, 電子情報通信学会 ソサイエティ大会, Sept. 2020.
• Bangan Liu, Yuncheng Zhang, Junjun Qiu, Wei Deng, Zule Xu, Haosheng Zhang, Jian Pang, Yun Wang, Rui Wu, 染谷 晃基, 白根 篤史, 岡田 健一. A 21.7% System Power Efficiency Fully-Synthesizable Transmitter for sub-GHz IoT Applications, 電子情報通信学会 ソサイエティ大会, Sept. 2019.
• Haosheng Zhang, Hans Herdian, 白根 篤史, 岡田 健一. 0.2mW 70fs Jitter Injection Locked PLL, 電子情報通信学会 ソサイエティ大会, Sept. 2019.
• Haosheng Zhang, Aravind Tharayil Narayanan, Hans Herdian, Bangan Liu, Yun Wang, Atsushi Shirane, Kenichi Okada. 0.2mW 70fsrms-Jitter Injection-Locked PLL Using De-Sensitized SSPD-Based Injecting-Time Self-Alignment Achieving -270dB FoM and -66dBc Reference Spur, IEEE SSCS Japan Chapter VLSI Circuits報告会, July 2019.
• Haosheng Zhang, Hans Herdian, Aravind Tharayil Narayanan, 白根 篤史, 鈴木 暢, 原坂 和宏, 安達 一彦, 柳町 真也, 岡田 健一. An ultra-low-power atomic clock based on CMOS probing and locking loop, 電子情報通信学会 LSIとシステムのワークショップ, May 2019.
• Haosheng Zhang, Hans Herdian, Tn Aravind, Atsushi Shirane, Nobue Suzuki, 原坂 和宏, 安達 一彦, Shinya Yanagimach, Kenichi Okada. Ultra-Low-Power Atomic Clock for Satellite Constellation with 2.2x10-12 Long-Term Allan Deviation Using Cesium Coherent Population Trapping, IEEE SSCS Japan Chapter ISSCC報告会, Mar. 2019.
• Haosheng Zhang, Fadila Ashibir Aviat, Atsushi Shirane, Kenichi Okada. A High-Power-Efficiency Stacked PA and VCO Cell, 電子情報通信学会 ソサイエティ大会, Sept. 2018.
• Hans Herdian, Haosheng Zhang, Atsushi Shirane, Kenichi Okada. Wide Tuning-Range VCO Implementation with Helium-3 Irradiated Inductor, 電子情報通信学会 ソサイエティ大会, Sept. 2018.
• Pham Van Tuan, Hanli Liu, Haosheng Zhang, Kenichi Okada, Akira Matsuzawa. A 0.65mW 4.6GHz VCO with Low Phase Noise for Chip Scale Atomic Clock, 電子情報通信学会 総合大会, C-12-27, Mar. 2018.
• Haosheng Zhang, 岡田 健一, 松澤 昭. A Synthesizable High Resolution Linear DTC, 電子情報通信学会 総合大会, Mar. 2017.
• Haosheng Zhang, Tn Aravind, Kenichi Okada, Akira Matsuzawa. An Analysis of Pulse-VCO with Tail-Filter, 電子情報通信学会 ソサイエティ大会, C-12-6, Sept. 2016.

学位論文

• An Ultra-Low-Power Miniaturized Atomic Clock Based on CMOS Frequency Probing and Synchronization Loop,  Summary,  Doctor (Academic),  Tokyo Institute of Technology,  2019/12/31,   
• An Ultra-Low-Power Miniaturized Atomic Clock Based on CMOS Frequency Probing and Synchronization Loop,  Exam Summary,  Doctor (Academic),  Tokyo Institute of Technology,  2019/12/31,   
• An Ultra-Low-Power Miniaturized Atomic Clock Based on CMOS Frequency Probing and Synchronization Loop,  Thesis,  Doctor (Academic),  Tokyo Institute of Technology,  2019/12/31,   

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