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ChuVan Thiem 2018年 研究業績一覧 (5件 / 36件)
国際会議発表 (査読有り)
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Thiem Van Chu,
Kenji Kise.
An Effective Architecture for Trace-Driven Emulation of Networks-on-Chip on FPGAs,
28th International Symposium on Field-Programmable Logic and Applications (FPL 2018),
pp. 419-426,
Aug. 2018.
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Makoto Saitoh,
Elsayed A. Elsayed,
Thiem Van Chu,
Susumu Mashimo,
Kenji Kise.
A High-Performance and Cost-Effective Hardware Merge Sorter without Feedback Datapath,
IEEE International Symposium on Field-Programmable Custom Computing Machines (FCCM 2018),
pp. 197-204,
Apr. 2018.
学位論文
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Hardware-Accelerated Modeling of Large-Scale Networks-on-Chip,
Thesis,
Doctor (Engineering),
Tokyo Institute of Technology,
2018/09/20,
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Hardware-Accelerated Modeling of Large-Scale Networks-on-Chip,
Summary,
Doctor (Engineering),
Tokyo Institute of Technology,
2018/09/20,
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Hardware-Accelerated Modeling of Large-Scale Networks-on-Chip,
Exam Summary,
Doctor (Engineering),
Tokyo Institute of Technology,
2018/09/20,
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