@article{CTT100803831,
  author = {Hanli Liu and Zheng Sun and Hongye Huang and Wei Deng and Teerachot Siriburanon and Jian Pang and Yun Wang and Rui Wu and Teruki Someya and Atsushi Shirane and Kenichi Okada},
  title = {A 265-µW Fractional-N Digital PLL with Seamless Automatic Switching Sub-sampling/Sampling Feedback Path and Duty-Cycled Frequency-Locked Loop in 65nm CMOS},
  journal = {IEEE Journal of Solid-State Circuits (JSSC)},
  year = 2019,
}

@inproceedings{CTT100841991,
  author = {Hongye Huang and Hanli Liu and Zheng Sun and Dingxin Xu and 染谷 晃基 and 白根 篤史 and 岡田 健一},
  title = {A 2.4GHz Low-Power Subsampling/Sampling-Mixed Fractional-N All-Digital PLL},
  booktitle = {},
  year = 2019,
}

@inproceedings{CTT100841956,
  author = {Zheng Sun and Hanli Liu and Dingxin Xu and Hongye Huang and Bangan Liu and Zheng Li and Jian Pang and Teruki Someya and Atsushi Shirane and Kenichi Okada},
  title = {A 78fs RMS Jitter Injection-Locked Clock Multiplier Using Transformer-Based Ultra-Low-Power VCO},
  booktitle = {},
  year = 2019,
}

@inproceedings{CTT100841988,
  author = {Zheng Sun and Dingxin Xu and Hongye Huang and 染谷 晃基 and 白根 篤史 and 岡田 健一},
  title = {A 78fs RMS Jitter Injection-Locked Clock Multiplier Using Transformer-Based Ultra-Low-Power VCO},
  booktitle = {},
  year = 2019,
}

@inproceedings{CTT100841990,
  author = {Dingxin Xu and Zheng Sun and Hongye Huang and 染谷 晃基 and 白根 篤史 and 岡田 健一},
  title = {A Time-Amplifier Gain Calibration Technique for ADPLL},
  booktitle = {},
  year = 2019,
}

@inproceedings{CTT100841976,
  author = {Dingxin Xu and Hanli Liu and Zheng Sun and Hongye Huang and Wei Deng and Teerachot Siriburanon and Jian Pang and Yun Wang and Rui Wu and 染谷 晃基 and 白根 篤史 and 岡田 健一},
  title = {A 265-µW Fractional-N Digital PLL with Switching Subsampling/Sampling Feedback},
  booktitle = {},
  year = 2019,
}

@inproceedings{CTT100841975,
  author = {Zheng Sun and Hanli Liu and Dexian Tang and Hongye Huang and 金子 徹 and Rui Wu and Wei Deng and 染谷 晃基 and 白根 篤史 and 岡田 健一},
  title = {A T/R Switch Embedded BLE Transceiver with 2.6mW Harmonic-Suppressed Transmitter and 2.3mW Hybrid-Loop Receiver」,},
  booktitle = {},
  year = 2019,
}

@inproceedings{CTT100815501,
  author = {Hongye Huang and Hanli Liu and Zheng Sun and Teruki Someya and Atsushi Shirane and Kenichi Okada},
  title = {An Energy-Saving Digital-to-Time Converter for Ultra-Low-Power Digital PLLs},
  booktitle = {},
  year = 2019,
}

@inproceedings{CTT100816257,
  author = {Jian Pang and Zheng Li and 窪添 諒 and Xueting Luo and Rui Wu and Yun Wang and Dongwon You and Ashbir Aviat Fadila and Rattanan Saengchan and 中村 岳資 and Joshua Alvin and 松本 大輝 and THARAYILNAARAVIND and Bangan Liu and Junjun Qiu and Hanli Liu and Zheng Sun and Hongye Huang and 白根 篤史 and 岡田 健一},
  title = {双方向動作可能な5GNR二偏波MIMO対応28GHz帯CMOSフェーズドアレイ無線機},
  booktitle = {},
  year = 2019,
}

@inproceedings{CTT100815500,
  author = {Pang Jian and Zheng Li and Ryo Kubozoe and Xueting Luo and Rui Wu and Yun Wang and Dongwon You and Ashbir Aviat Fadila and Rattanan Saengchan and Takeshi Nakamura and Joshua Alvin and Daiki Matsumoto and Tn Aravind and Bangan Liu and Hanli Liu and Zheng Sun and Hongye Huang and Korkut Kaan Tokgoz and 大島 直樹 and 元井 桂一 and 堀 真一 and 國弘 和明 and Tomoya Kaneko and Atsushi Shirane and Kenichi Okada},
  title = {A 28GHz CMOS Phased-Array Beamformer Utilizing Neutralized Bi-Directional Technique Supporting Dual-Polarized MIMO for 5G NR},
  booktitle = {},
  year = 2019,
}

@inproceedings{CTT100815502,
  author = {Zheng Sun and Hanli Liu and Dexian Tang and Hongye Huang and Tohru Kaneko and Rui Wu and Wei Deng and Teruki Someya and Atsushi Shirane and Kenichi Okada},
  title = {A 0.85mm2 BLE Transceiver with Embedded T/R Switch, 2.6mW Fully-Passive Harmonic Suppressed Transmitter and 2.3mW Hybrid-Loop Receiver},
  booktitle = {},
  year = 2019,
}

@inproceedings{CTT100814907,
  author = {Hanli Liu and Zheng Sun and Hongye Huang and Wei Deng and Teerachot Siriburanon and Pang Jian and Yun Wang and Rui Wu and 染谷 晃基 and Atsushi Shirane and Kenichi Okada},
  title = {A 265-µW Fractional-N Digital PLL with Seamless Automatic Switching Subsampling/Sampling Feedback Path and Duty-Cycled Frequency-Locked Loop in 65nm CMOS},
  booktitle = {},
  year = 2019,
}

@inproceedings{CTT100810931,
  author = {Jian Pang and Zheng Li and Ryo Kubozoe and Xueting Luo and Rui Wu and Yun Wang and Dongwon You and Ashbir Aviat Fadila and Rattanan Saengchan and Takeshi Nakamura and Joshua Alvin and Daiki Matsumoto and Tn Aravind and Bangan Liu and Hanli Liu and Zheng Sun and Hongye Huang and Korkut Kaan Tokgoz and Naoki Oshima and Keiichi Motoi and Shinichi Hori and Kazuaki Kunihiro and Tomoya Kaneko and Atsushi Shirane and Kenichi Okada},
  title = {A 28GHz CMOS Phased-Array Beamformer Utilizing Neutralized Bi-Directional Technique Supporting Dual-Polarized MIMO for 5G NR},
  booktitle = {},
  year = 2019,
}

@inproceedings{CTT100816084,
  author = {Hanli Liu and Zheng Sun and Hongye Huang and Wei Deng and Teerachot Siriburanon and Jian Pang and Yun Wang and Rui Wu and Teruki Someya and Atsushi Shirane and Kenichi Okada},
  title = {A 265-µW Fractional-N Digital PLL with Seamless Automatic Switching Subsampling/Sampling Feedback Path and Duty-Cycled Frequency-Locked Loop in 65nm CMOS},
  booktitle = {},
  year = 2019,
}