@article{CTT100879342,
  author = {Junjun Qiu and Zheng Sun and Bangan Liu and Wenqian Wang and Dingxin Xu and Hans Herdian and Hongye Huang and Yuncheng Zhang and Yun Wang and Jian Pang and Hanli Liu and Masaya Miyahara and Atsushi Shirane and Kenichi Okada},
  title = {A 32kHz-Reference 2.4GHz Fractional-N Oversampling PLL with 200kHz Loop Bandwidth},
  journal = {IEEE Journal of Solid-State Circuits},
  year = 2021,
}

@article{CTT100841933,
  author = {Zheng Sun and Hanli Liu and Dingxin Xu and Hongye Huang and Bangan Liu and Zheng Li and Jian Pang and Teruki Someya and Atsushi Shirane and Kenichi Okada},
  title = {A Low-Jitter Injection-Locked Clock Multiplier Using 97-µW Transformer-Based VCO with 18-kHz Flicker Noise Corner},
  journal = {IEICE Transactions on Electronics},
  year = 2021,
}

@inproceedings{CTT100879419,
  author = {. Zheng Sun and Dingxin Xu and Junjun Qiu and Zezheng Liu and Yuncheng Zhang and Hongye Huang and Hanli Liu and Bangan Liu and Zheng Li and Jian Pang and Atsushi Shirane and Kenichi Okada},
  title = {A 0.25mm2 BLE Transmitter with Direct Antenna Interface and 19% System Efficiency Using Duty-Cycled Edge-Timing Calibration},
  booktitle = {},
  year = 2021,
}

@inproceedings{CTT100879512,
  author = {Junjun Qiu and Zheng Sun and Bangan Liu and Wenqian Wang and Dingxin Xu and Hans Herdian and Hongye Huang and Yuncheng Zhang and Yun Wang and Atsushi Shirane and Kenichi Okada},
  title = {200kHzループ帯域幅の32kHzリファレンス2.4GHzフラクショナルNオーバーサンプリングPLL},
  booktitle = {},
  year = 2021,
}

@inproceedings{CTT100841938,
  author = {Junjun Qiu and Zheng Sun and Bangan Liu and Wenqian Wang and Dingxin Xu and Hans Herdian and Hongye Huang and Yuncheng Zhang and Yun Wang and Atsushi Shirane and Kenichi Okada},
  title = {A 32kHz-Reference 2.4GHz Fractional-N Oversampling PLL with 200kHz Loop Bandwidth},
  booktitle = {},
  year = 2021,
}

@inproceedings{CTT100841940,
  author = {Zheng Sun and Dingxin Xu and Junjun Qiu and Atsushi Shirane and Kenichi Okada},
  title = {A 0.38mm2 BLE Transmitter with 29% System Efficiency Using Duty-Cycled Edge-Timing Calibration in 65nm CMOS},
  booktitle = {},
  year = 2021,
}