VLSI回路の階層設計をサポートする階層化BSGフロアプラン

Publication Information

Title

Japanese:	VLSI回路の階層設計をサポートする階層化BSGフロアプラン
English:	Hierarchical BSG Floorplan for Hierarchical VLSI Circuit Design

Author

Japanese:	呉中林, 中武繁寿, 高橋篤司, 梶谷洋司.
English:	Zhonglin Wu, Shigetoshi Nakatake, Atsushi Takahashi, Yoji Kajitani.

Language

Japanese

Journal/Book name

Japanese:	電子情報通信学会論文誌
English:	IEICE Trans. Fundamentals (Japanese Edition)

Volume, Number, Page

Vol. J83-A No. 10 pp. 1161-1168

Published date

Oct. 1, 2000

Publisher

Japanese:
English:

Conference name

Japanese:
English:

Conference site

Japanese:
English:

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