論文

• DARYOUSH ZADEH, Hiroshi Oomine, Yuya Suzuki, Kuniyuki KAKUSHIMA, パールハットアヘメト, Hiroshi Nohira, 片岡好則, Akira Nishiyama, Nobuyuki Sugii, KAZUO TSUTSUI, Kenji Natori, HIROSHI IWAI. La2O3/Ino.53Ga.0.47As metal-oxide-semiconductor capacitor with low interface state density using TiN/W gate alectrode, Solid-State Electronics, Vol. 82, pp. 29-33, Apr. 2013.
• DARYOUSH ZADEH, Soshi Sato, Kuniyuki KAKUSHIMA, A. Srivastava, Ahmet Parhat, KAZUO TSUTSUI, 西山彰, Nobuyuki Sugii, KENJI NATORI, takeo hattori, C.K. Sarkar, HIROSHI IWAI. Effects of La2O3 incorporation in HfO2 gated nMOSFETs on low-frequency noise, Microelectronics Reliability, Vol. 51, pp. 746-750, Apr. 2011.

国際会議発表 (査読有り)

• DARYOUSH ZADEH, Hiroshi Oomine, Kuniyuki KAKUSHIMA, 片岡好則, 西山彰, Nobuyuki Sugii, Hitoshi Wakabayashi, KAZUO TSUTSUI, Kenji Natori, HIROSHI IWAI. Low DitHigh-k/In0.53Ga0.47As Gate Stack with CET down to 0.73 nm and Thermally Stable Silicide Contact by Suppression of Interfacial Reaction, IEDM 2013, 2014.
• DARYOUSH ZADEH, Hiroshi Oomine, Yuya Suzuki, Kuniyuki KAKUSHIMA, Hiroshi Nohira, Akira Nishiyama, Nobuyuki Sugii, KAZUO TSUTSUI, Kenji Natori, HIROSHI IWAI. La2O3/Ino.53Ga.0.47As metal-oxide-semiconductor capacitor with low interface state density using TiN/W gate alectrode, 2013.

国際会議発表 (査読なし・不明)

• Hiroshi Oomine, DARYOUSH ZADEH, Kuniyuki KAKUSHIMA, Akira Nishiyama, Nobuyuki Sugii, 片岡好則, Hitoshi Wakabayashi, KAZUO TSUTSUI, Kenji Natori, HIROSHI IWAI. Effect of pretreatment for high-/k//InGaAs interface property, The Workshop on Future Trend of Nanoelectronics:WIMNACT 39, 2014.
• Hiroshi Oomine, DARYOUSH ZADEH, Kuniyuki KAKUSHIMA, 片岡好則, 西山彰, Nobuyuki Sugii, Hitoshi Wakabayashi, KAZUO TSUTSUI, Kenji Natori, HIROSHI IWAI. Electrical characterization of atomic layer deposited La2O3 films on In0.53Ga0.47AAs substrates, ECS 224nd Meeting, ECS Transactions, Vol. 58, No. 7, pp. 385-389, Oct. 2013.
• DARYOUSH ZADEH, Yuya Suzuki, Kuniyuki KAKUSHIMA, パールハットアヘメト, 西山彰, Nobuyuki Sugii, KAZUO TSUTSUI, Kenji Natori, takeo hattori, HIROSHI IWAI. Characterization of metal Schottky junction for InGaAs substrate, G-COE PICE International Symposium and IEEE EDS Minicolloquium on Advanced Hybrid Nano Devices: Prospects by World’s Leading Scientists, 2013.
• Ryuji Hosoi, Yuya Suzuki, DARYOUSH ZADEH, Kuniyuki KAKUSHIMA, パールハットアヘメト, 片岡好則, Akira Nishiyama, Nobuyuki Sugii, KAZUO TSUTSUI, Kenji Natori, takeo hattori, HIROSHI IWAI. Characterization of matal Schottky junction for In0.53Ga0.47AAs substrates, CSTIC 2012, 2012.
• Ryuji Hosoi, Yuya Suzuki, DARYOUSH ZADEH, Kuniyuki KAKUSHIMA, パールハットアヘメト, Akira Nishiyama, Nobuyuki Sugii, KAZUO TSUTSUI, Kenji Natori, takeo hattori, HIROSHI IWAI. A novel interpretation of frequency dispersed capacitances in InGaAs capacitor by conductance method, IEEE EDS MQ WIMNACT 32 C0-sponsored by EDS Japan Chapter and TIT, 2012.
• DARYOUSH ZADEH, Ryuji Hosoi, Yuya Suzuki, Kuniyuki KAKUSHIMA, パールハットアヘメト, Akira Nishiyama, Nobuyuki Sugii, KAZUO TSUTSUI, Kenji Natori, takeo hattori, HIROSHI IWAI. Electrical Characterization and improvement of high-k/InGaAs devices, IEEE EDS MQ WIMNACT 32 C0-sponsored by EDS Japan Chapter and TIT, 2012.

国内会議発表 (査読なし・不明)

• ｻﾞﾃﾞﾊｻﾝ ﾀﾞﾘﾕｰｼﾕ, 大嶺洋, 角嶋邦之, 岩井洋. Highly Scalable La2O３/InGaAs Gate Stack with Low Interface State Density, 最先端研究開発支援プログラム(FIRST)採択課題「グリーン・ナノエレクトロニクスのコア技術開発」最終成果報告会, 2014.
• 大嶺洋, ｻﾞﾃﾞﾊｻﾝ ﾀﾞﾘﾕｰｼﾕ, 角嶋邦之, 岩井洋. La2O３ gate dielectrics for InGaAs channel using ALD process, 最先端研究開発支援プログラム(FIRST)採択課題「グリーン・ナノエレクトロニクスのコア技術開発」最終成果報告会, 2014.
• ｻﾞﾃﾞﾊｻﾝ ﾀﾞﾘﾕｰｼﾕ, 大嶺洋, 角嶋邦之, 片岡好則, 西山彰, 杉井信之, 若林整, 筒井一生, 名取研二, 岩井洋. 低界面準位とsub-nm CETを有するLa2O３/ In0.53Ga0.47Asゲートスタックの実現, 第61回応用物理学会春季学術講演会, 2014.
• ｻﾞﾃﾞﾊｻﾝ ﾀﾞﾘﾕｰｼﾕ, 大嶺洋, 岩井洋. 低界面準位とsub-nm CETを有するLa2O３/ In0.53Ga0.47Asゲートスタックの実現, 第61回応用物理学会春季学術講演会, 2014.
• 大嶺洋, ｻﾞﾃﾞﾊｻﾝ ﾀﾞﾘﾕｰｼﾕ, 角嶋邦之, 西山彰, 杉井信之, 片岡好則, 若林整, 筒井一生, 名取研二, 岩井洋. La2O３/ InGaAs界面ラフネスに及ぼすALDプロセスの影響, 第61回応用物理学会春季学術講演会, 2014.
• 鹿国強, 大嶺洋, ｻﾞﾃﾞﾊｻﾝ ﾀﾞﾘﾕｰｼﾕ, 角嶋邦之, 西山彰, 杉井信之, 片岡好則, 若林整, 筒井一生, 名取研二, 岩井洋. ALD堆積条件によるLa2O３/In0.53Ga0.47Asキャパシタの電気特性への影響, 第74回応用物理学会秋季学術講演会, 2013.

学位論文

• A study on Semiconductor Interfaces with Rare Earth Oxide and Ni Silicides for High Performance InGaAs MOSFETs,  Thesis,  Doctor (Engineering),  Tokyo Institute of Technology,  2013/09/25,   
• A study on Semiconductor Interfaces with Rare Earth Oxide and Ni Silicides for High Performance InGaAs MOSFETs,  Summary,  Doctor (Engineering),  Tokyo Institute of Technology,  2013/09/25,   
• A study on Semiconductor Interfaces with Rare Earth Oxide and Ni Silicides for High Performance InGaAs MOSFETs,  Exam Summary,  Doctor (Engineering),  Tokyo Institute of Technology,  2013/09/25,   

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