国際会議発表 (査読有り)

• Dingxin Xu, Zezheng Liu, Yifeng Kuai, Hongye Huang, Yuncheng Zhang, Zheng Sun, Bangan Liu, Wenqian Wang, Yuang Xiong, Junjun Qiu, Waleed Madany, Yi Zhang, Ashbir Aviat Fadila, Atsushi Shirane, Kenichi Okada. A 7GHz Digital PLL with Cascaded Fractional Divider and Pseudo-Differential DTC Achieving -62.1dBc Fractional Spur and 143.7fs Integrated Jitter, IEEE International Solid-State Circuits Conference (ISSCC), Feb. 2024.
• Yi Zhang, Minzhe Tang, Jian Pang, Zheng Li, Dongfan Xu, Kenichi Okada. IEEE International Solid-State Circuits Conference (ISSCC) Student Research Preview, Feb. 2024.

国内会議発表 (査読なし・不明)

• Dongfan Xu, Minzhe Tang, Yi Zhang, Zheng Li, 白根 篤史, 岡田 健一. A 24-71-GHz Dual-Mode Mixer with Harmonic-Selection Technique for Multi-Band 5G NR, 電子情報通信学会 総合大会, Mar. 2024.
• Yi Zhang, Dongfan Xu, Zheng Li, 白根 篤史, 岡田 健一. A Self-Locked Duty Cycle Control Cell with 40% Tuning Range for Clock Distribution Network, 電子情報通信学会 総合大会, Mar. 2024.
• Minzhe Tang, Jian Pang, Zheng Li, Yi Zhang, 白根 篤史, 岡田 健一. A Compact 28GHz Bi-Directional Power-Combined Antenna Interface in WLCSP Achieving 18Gb/s for 5G and B5G Phased-Array Transceivers, 電子情報通信学会 総合大会, Mar. 2024.

[ BibTeX 形式で保存 ]    [ 論文・著書をCSV形式で保存 ]    [ 特許をCSV形式で保存 ]