Systematic Design of MOSFET-C Impedance Simulation Circuits Based on GIC

Publication Information

Title

Japanese:
English:	Systematic Design of MOSFET-C Impedance Simulation Circuits Based on GIC

Author

Japanese:	佐藤隆英, 高木茂孝, 藤井信生.
English:	Takahide Sato, Shigetaka Takagi, Nobuo Fujii.

Language

English

Journal/Book name

Japanese:
English:	Proc. IEEJ International Analog VLSI Workshop

Volume, Number, Page

Vol. CD-ROM

Published date

Oct. 2005

Publisher

Japanese:
English:

Conference name

Japanese:
English:	2005 IEEJ International Analog VLSI Workshop

Conference site

Japanese:
English:	Bordeau, France