Estimation of Power Reduction by On-Chip Transmission Line for 45nm Technology

Publication Information

Title

Japanese:
English:	Estimation of Power Reduction by On-Chip Transmission Line for 45nm Technology

Author

Japanese:	岡田健一, Takumi Uezono, 益一哉.
English:	Kenichi Okada, Takumi Uezono, Kazuya Masu.

Language

English

Journal/Book name

Japanese:
English:

Volume, Number, Page

pp. 181-190

Published date

Sept. 2006

Publisher

Japanese:
English:

Conference name

Japanese:
English:	International Workshop on Power and Timing Modeling, Optimization and Simulation (PATMOS)

Conference site

Japanese:
English:	Montpellier, France