A Super Instruction-Flow Architecture for High Performance and Low Power Processors

Publication Information

Title

Japanese:
English:	A Super Instruction-Flow Architecture for High Performance and Low Power Processors

Author

Japanese:	吉瀬謙二, 片桐孝洋, 本多弘樹, 弓場敏嗣.
English:	Kenji Kise, Takahiro Katagiri, Hiroki Honda, Toshitsugu Yuba.

Language

English

Journal/Book name

Japanese:
English:	Proceedings of the Innovative Architecture on Future Generation High-Performance Processors and Systems(IWIA-2004)

Volume, Number, Page

pp. 10-19

Published date

2004

Publisher

Japanese:
English:	IEEE Computer Society

Conference name

Japanese:
English:

Conference site

Japanese:
English: