Power and Chip-area Reduction Technique fro OTA-C based Active Inductor

Publication Information

Title

Japanese:
English:	Power and Chip-area Reduction Technique fro OTA-C based Active Inductor

Author

Japanese:	佐藤隆英, 高木茂孝, 須田悟史, 藤井信生.
English:	Takahide Sato, Shigetaka Takagi, Satoshi Suda, Nobuo Fujii.

Language

English

Journal/Book name

Japanese:
English:	Proceedings of the 2007 IEEJ International Analog VLSI Workshop

Volume, Number, Page

pp. 99-104

Published date

Nov. 2007

Publisher

Japanese:	電子回路研究専門委員会
English:

Conference name

Japanese:
English:	2007 IEEJ International Analog VLSI Workshop

Conference site

Japanese:
English:	Bunratty，Ireland