Japanese
Home
Search
Horizontal Search
Publication Search
( Advanced Search )
Patent Search
( Advanced Search )
Research Highlight Search
( Advanced Search )
Researcher Search
Search by Organization
Support
FAQ
T2R2 User Registration
Doctoral thesis registration
Support/Contact
About T2R2
What's T2R2?
Operation Guidance
Leaflets
About file disclosure
Related Links
Tokyo Tech
STAR Search
NII IR Program
Home
>
Help
Publication Information
Title
Japanese:
English:
Interconnect challenges in nano CMOS circuit
Author
Japanese:
益 一哉
,
天川 修平
,
石原 昇
.
English:
Kazuya Masu
,
Shuhei Amakawa
,
Noboru Ishihara
.
Language
English
Journal/Book name
Japanese:
English:
International Symposium on Technology Evolution for Silicon Nano-Slectronics (ISTESNE)
Volume, Number, Page
pp. 28
Published date
June 2010
Publisher
Japanese:
English:
International Symposium on Technology Evolution for Silicon Nano-Slectronics (ISTESNE)
Conference name
Japanese:
English:
International Symposium on Technology Evolution for Silicon Nano-Slectronics (ISTESNE)
Conference site
Japanese:
English:
Tokyo, Japan
©2007
Tokyo Institute of Technology All rights reserved.