A 24 dB Gain 51-68 GHz CMOS Low Noise Amplifier Using Asymmetric-Layout Transistors

Publication Information

Title

Japanese:
English:	A 24 dB Gain 51-68 GHz CMOS Low Noise Amplifier Using Asymmetric-Layout Transistors

Author

Japanese:	李寧, 文仙啓吾, 高山直輝, 卜慶紅, 鈴木俊秀, Masaru Sato, 廣瀬達哉, 岡田健一, 松澤昭.
English:	Ning Li, Keigo Bunsen, Naoki Takayama, Qinghong Bu, Toshihide Suzuki, Masaru Sato, Tatsuya Hirose, Kenichi Okada, Akira Matsuzawa.

Language

English

Journal/Book name

Japanese:
English:

Volume, Number, Page

pp. 342-345

Published date

Sept. 2010

Publisher

Japanese:
English:

Conference name

Japanese:
English:	IEEE European Solid-State Circuits Conference (ESSCIRC)

Conference site

Japanese:
English:	"Seville, Spain"